lut_bottom        305 drivers/clk/tegra/clk-dfll.c 	u8				lut_bottom, lut_min, lut_max, lut_safe;
lut_bottom        744 drivers/clk/tegra/clk-dfll.c 	td->lut_min = td->lut_bottom;
lut_bottom        807 drivers/clk/tegra/clk-dfll.c 	for (i = td->lut_bottom; i < td->lut_size; i++) {
lut_bottom       1589 drivers/clk/tegra/clk-dfll.c 	u8 lut_bottom = MAX_DFLL_VOLTAGES;
lut_bottom       1601 drivers/clk/tegra/clk-dfll.c 		if ((lut_bottom == MAX_DFLL_VOLTAGES) && (reg_volt >= v_min))
lut_bottom       1602 drivers/clk/tegra/clk-dfll.c 			lut_bottom = i;
lut_bottom       1607 drivers/clk/tegra/clk-dfll.c 	if ((lut_bottom == MAX_DFLL_VOLTAGES) ||
lut_bottom       1608 drivers/clk/tegra/clk-dfll.c 	    (lut_bottom + 1 >= td->lut_size)) {
lut_bottom       1613 drivers/clk/tegra/clk-dfll.c 	td->lut_bottom = lut_bottom;
lut_bottom       1616 drivers/clk/tegra/clk-dfll.c 	rate = get_dvco_rate_below(td, td->lut_bottom);
lut_bottom       1651 drivers/clk/tegra/clk-dfll.c 	td->lut_bottom = 0;