lr_val 454 virt/kvm/arm/hyp/vgic-v3-sr.c u64 *lr_val) lr_val 482 virt/kvm/arm/hyp/vgic-v3-sr.c *lr_val = val; lr_val 487 virt/kvm/arm/hyp/vgic-v3-sr.c *lr_val = ICC_IAR1_EL1_SPURIOUS; lr_val 493 virt/kvm/arm/hyp/vgic-v3-sr.c int intid, u64 *lr_val) lr_val 503 virt/kvm/arm/hyp/vgic-v3-sr.c *lr_val = val; lr_val 508 virt/kvm/arm/hyp/vgic-v3-sr.c *lr_val = ICC_IAR1_EL1_SPURIOUS; lr_val 645 virt/kvm/arm/hyp/vgic-v3-sr.c u64 lr_val; lr_val 651 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); lr_val 655 virt/kvm/arm/hyp/vgic-v3-sr.c if (grp != !!(lr_val & ICH_LR_GROUP)) lr_val 659 virt/kvm/arm/hyp/vgic-v3-sr.c lr_prio = (lr_val & ICH_LR_PRIORITY_MASK) >> ICH_LR_PRIORITY_SHIFT; lr_val 666 virt/kvm/arm/hyp/vgic-v3-sr.c lr_val &= ~ICH_LR_STATE; lr_val 668 virt/kvm/arm/hyp/vgic-v3-sr.c if ((lr_val & ICH_LR_VIRTUAL_ID_MASK) <= VGIC_MAX_SPI) lr_val 669 virt/kvm/arm/hyp/vgic-v3-sr.c lr_val |= ICH_LR_ACTIVE_BIT; lr_val 670 virt/kvm/arm/hyp/vgic-v3-sr.c __gic_v3_set_lr(lr_val, lr); lr_val 672 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK); lr_val 679 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_clear_active_lr(int lr, u64 lr_val) lr_val 681 virt/kvm/arm/hyp/vgic-v3-sr.c lr_val &= ~ICH_LR_ACTIVE_BIT; lr_val 682 virt/kvm/arm/hyp/vgic-v3-sr.c if (lr_val & ICH_LR_HW) { lr_val 685 virt/kvm/arm/hyp/vgic-v3-sr.c pid = (lr_val & ICH_LR_PHYS_ID_MASK) >> ICH_LR_PHYS_ID_SHIFT; lr_val 689 virt/kvm/arm/hyp/vgic-v3-sr.c __gic_v3_set_lr(lr_val, lr); lr_val 705 virt/kvm/arm/hyp/vgic-v3-sr.c u64 lr_val; lr_val 716 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_find_active_lr(vcpu, vid, &lr_val); lr_val 722 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_clear_active_lr(lr, lr_val); lr_val 728 virt/kvm/arm/hyp/vgic-v3-sr.c u64 lr_val; lr_val 745 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_find_active_lr(vcpu, vid, &lr_val); lr_val 751 virt/kvm/arm/hyp/vgic-v3-sr.c lr_prio = (lr_val & ICH_LR_PRIORITY_MASK) >> ICH_LR_PRIORITY_SHIFT; lr_val 754 virt/kvm/arm/hyp/vgic-v3-sr.c if (grp != !!(lr_val & ICH_LR_GROUP) || lr_val 759 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_clear_active_lr(lr, lr_val); lr_val 916 virt/kvm/arm/hyp/vgic-v3-sr.c u64 lr_val; lr_val 921 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); lr_val 925 virt/kvm/arm/hyp/vgic-v3-sr.c lr_grp = !!(lr_val & ICH_LR_GROUP); lr_val 927 virt/kvm/arm/hyp/vgic-v3-sr.c lr_val = ICC_IAR1_EL1_SPURIOUS; lr_val 930 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK); lr_val 36 virt/kvm/arm/vgic/vgic-v2.c static bool lr_signals_eoi_mi(u32 lr_val) lr_val 38 virt/kvm/arm/vgic/vgic-v2.c return !(lr_val & GICH_LR_STATE) && (lr_val & GICH_LR_EOI) && lr_val 39 virt/kvm/arm/vgic/vgic-v2.c !(lr_val & GICH_LR_HW); lr_val 25 virt/kvm/arm/vgic/vgic-v3.c static bool lr_signals_eoi_mi(u64 lr_val) lr_val 27 virt/kvm/arm/vgic/vgic-v3.c return !(lr_val & ICH_LR_STATE) && (lr_val & ICH_LR_EOI) && lr_val 28 virt/kvm/arm/vgic/vgic-v3.c !(lr_val & ICH_LR_HW);