MCIF_WB_BUF_1_ADDR_C   64 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	SRI(MCIF_WB_BUF_1_ADDR_C, MCIF_WB, inst),\
MCIF_WB_BUF_1_ADDR_C  120 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	SF(MCIF_WB0_MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, mask_sh),\
MCIF_WB_BUF_1_ADDR_C  185 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	type MCIF_WB_BUF_1_ADDR_C;\
MCIF_WB_BUF_1_ADDR_C  227 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	uint32_t MCIF_WB_BUF_1_ADDR_C;
MCIF_WB_BUF_1_ADDR_C   92 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c 	REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0]));
MCIF_WB_BUF_1_ADDR_C   78 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	SRI(MCIF_WB_BUF_1_ADDR_C, MCIF_WB, inst),\
MCIF_WB_BUF_1_ADDR_C  224 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	SF(MCIF_WB0_MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, mask_sh),\
MCIF_WB_BUF_1_ADDR_C  386 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	type MCIF_WB_BUF_1_ADDR_C;\
MCIF_WB_BUF_1_ADDR_C  460 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	uint32_t MCIF_WB_BUF_1_ADDR_C;\