lpr1              410 arch/arm/mach-at91/pm.c 	u32 lpr0, lpr1 = 0;
lpr1              424 arch/arm/mach-at91/pm.c 		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
lpr1              425 arch/arm/mach-at91/pm.c 		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
lpr1              441 arch/arm/mach-at91/pm.c 		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
lpr1              474 arch/arm/mach-at91/pm.c 	u32 lpr0, lpr1 = 0;
lpr1              479 arch/arm/mach-at91/pm.c 		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
lpr1              480 arch/arm/mach-at91/pm.c 		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
lpr1              490 arch/arm/mach-at91/pm.c 		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);