MCIF_WB_BUFMGR_ENABLE  103 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	SF(MCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_ENABLE, mask_sh),\
MCIF_WB_BUFMGR_ENABLE  168 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	type MCIF_WB_BUFMGR_ENABLE;\
MCIF_WB_BUFMGR_ENABLE  226 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c 	REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_ENABLE, 1);
MCIF_WB_BUFMGR_ENABLE  234 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c 	REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_ENABLE, 0);
MCIF_WB_BUFMGR_ENABLE  118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	SF(MCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_ENABLE, mask_sh),\
MCIF_WB_BUFMGR_ENABLE  280 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	type MCIF_WB_BUFMGR_ENABLE;\