low_voltage_max_dispclk  147 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 				bw_fixed_to_int(vbios->low_voltage_max_dispclk));
low_voltage_max_dispclk 1201 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 						data->dmif_buffer_transfer_time[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], (bw_div(dceip->lb_write_pixels_per_dispclk, (bw_div(vbios->low_voltage_max_dispclk, dceip->display_pipe_throughput_factor)))));
low_voltage_max_dispclk 1258 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 						data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i])))));
low_voltage_max_dispclk 1583 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				&& bw_ltn(data->required_sclk, sclk[s_low]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_low], vbios->low_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_low] == number_of_displays_enabled_with_margin))) {
low_voltage_max_dispclk 1764 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	else if (bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) && sclk_message == bw_def_low && bw_ltn(data->dispclk, vbios->low_voltage_max_dispclk)) {
low_voltage_max_dispclk 2057 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(352);
low_voltage_max_dispclk 2173 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(459);
low_voltage_max_dispclk 2286 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(459);
low_voltage_max_dispclk 2402 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(459);
low_voltage_max_dispclk 2518 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(352);
low_voltage_max_dispclk 2631 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.low_voltage_max_dispclk = bw_int_to_fixed(460);
low_voltage_max_dispclk 1242 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	dc->bw_vbios->low_voltage_max_dispclk  = bw_frc_to_fixed(
low_voltage_max_dispclk  208 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed low_voltage_max_dispclk; /*m_hz*/