low_req_clk       200 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	enum dm_pp_clocks_state low_req_clk;
low_req_clk       214 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	low_req_clk = i + 1;
low_req_clk       215 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	if (low_req_clk > clk_mgr_dce->max_clks_state) {
low_req_clk       219 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 			low_req_clk = DM_PP_CLOCKS_STATE_INVALID;
low_req_clk       221 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 			low_req_clk = clk_mgr_dce->max_clks_state;
low_req_clk       224 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	return low_req_clk;
low_req_clk       219 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	enum dm_pp_clocks_state low_req_clk;
low_req_clk       233 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	low_req_clk = i + 1;
low_req_clk       234 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	if (low_req_clk > clk_mgr_dce->max_clks_state) {
low_req_clk       238 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			low_req_clk = DM_PP_CLOCKS_STATE_INVALID;
low_req_clk       240 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			low_req_clk = clk_mgr_dce->max_clks_state;
low_req_clk       243 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	return low_req_clk;