low_bit           150 arch/mips/include/asm/octeon/cvmx.h 				       uint64_t low_bit, uint64_t value)
low_bit           152 arch/mips/include/asm/octeon/cvmx.h 	return (value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit;
low_bit            66 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MASK(high_bit, low_bit) \
low_bit            67 drivers/gpu/drm/exynos/regs-mixer.h 	(((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
low_bit            69 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MASK_VAL(val, high_bit, low_bit) \
low_bit            70 drivers/gpu/drm/exynos/regs-mixer.h 	(((val) << (low_bit)) & MXR_MASK(high_bit, low_bit))
low_bit            52 drivers/gpu/drm/exynos/regs-vp.h #define VP_MASK(high_bit, low_bit) \
low_bit            53 drivers/gpu/drm/exynos/regs-vp.h 	(((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
low_bit            55 drivers/gpu/drm/exynos/regs-vp.h #define VP_MASK_VAL(val, high_bit, low_bit) \
low_bit            56 drivers/gpu/drm/exynos/regs-vp.h 	(((val) << (low_bit)) & VP_MASK(high_bit, low_bit))
low_bit           213 drivers/pinctrl/mediatek/pinctrl-mtk-common.c 		bits = drv_grp->high_bit - drv_grp->low_bit + 1;
low_bit           215 drivers/pinctrl/mediatek/pinctrl-mtk-common.c 		shift = pin_drv->bit + drv_grp->low_bit;
low_bit            81 drivers/pinctrl/mediatek/pinctrl-mtk-common.h 	unsigned char low_bit;
low_bit            90 drivers/pinctrl/mediatek/pinctrl-mtk-common.h 		.low_bit = _low,	\