lowMask          4528 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
lowMask          4542 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDCI] =
lowMask          4550 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_MVDD] =
lowMask          4559 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
lowMask           466 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint32_t lowMask[RV770_SMC_VOLTAGEMASK_MAX];
lowMask           792 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint32_t lowMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
lowMask           202 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint32_t lowMask[SISLANDS_SMC_VOLTAGEMASK_MAX];
lowMask          1537 drivers/gpu/drm/radeon/cypress_dpm.c 		table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDC] =
lowMask          1555 drivers/gpu/drm/radeon/cypress_dpm.c 		table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDCI] =
lowMask          1281 drivers/gpu/drm/radeon/ni_dpm.c 		table->voltageMaskTable.lowMask[NISLANDS_SMC_VOLTAGEMASK_VDDC] =
lowMask          1296 drivers/gpu/drm/radeon/ni_dpm.c 		table->voltageMaskTable.lowMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] =
lowMask           154 drivers/gpu/drm/radeon/nislands_smc.h     uint32_t lowMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
lowMask          1127 drivers/gpu/drm/radeon/rv770_dpm.c 	table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDC] =
lowMask          1154 drivers/gpu/drm/radeon/rv770_dpm.c 		table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_MVDD] =
lowMask           148 drivers/gpu/drm/radeon/rv770_smc.h     uint32_t lowMask[RV770_SMC_VOLTAGEMASK_MAX];
lowMask          4066 drivers/gpu/drm/radeon/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
lowMask          4080 drivers/gpu/drm/radeon/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDCI] =
lowMask          4088 drivers/gpu/drm/radeon/si_dpm.c 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_MVDD] =
lowMask          4097 drivers/gpu/drm/radeon/si_dpm.c 				table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
lowMask           202 drivers/gpu/drm/radeon/sislands_smc.h     uint32_t lowMask[SISLANDS_SMC_VOLTAGEMASK_MAX];