log2_dpte_req_width  387 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	unsigned int log2_dpte_req_width = 0;
log2_dpte_req_width  559 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		log2_dpte_req_width = log2_vmpg_width + 3;
log2_dpte_req_width  564 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  569 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		log2_dpte_req_width = log2_blk256_width + 4; // log2_64KB_width
log2_dpte_req_width  574 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  584 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	dpte_req_width = 1 << log2_dpte_req_width;
log2_dpte_req_width  622 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 					(log2_blk_width < log2_dpte_req_width) ?
log2_dpte_req_width  623 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 							log2_blk_width : log2_dpte_req_width;
log2_dpte_req_width  650 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_width;
log2_dpte_req_width  387 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	unsigned int log2_dpte_req_width = 0;
log2_dpte_req_width  559 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		log2_dpte_req_width = log2_vmpg_width + 3;
log2_dpte_req_width  564 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  569 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		log2_dpte_req_width = log2_blk256_width + 4; // log2_64KB_width
log2_dpte_req_width  574 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  584 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	dpte_req_width = 1 << log2_dpte_req_width;
log2_dpte_req_width  622 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 					(log2_blk_width < log2_dpte_req_width) ?
log2_dpte_req_width  623 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 							log2_blk_width : log2_dpte_req_width;
log2_dpte_req_width  650 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_width;
log2_dpte_req_width  379 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	unsigned int log2_dpte_req_width = 0;
log2_dpte_req_width  557 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		log2_dpte_req_width = log2_vmpg_width + 3;
log2_dpte_req_width  562 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  567 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		log2_dpte_req_width = log2_blk256_width + 4; // log2_64KB_width
log2_dpte_req_width  572 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		log2_dpte_req_width = log2_blk_width + 3;
log2_dpte_req_width  582 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	dpte_req_width = 1 << log2_dpte_req_width;
log2_dpte_req_width  625 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 					(log2_blk_width < log2_dpte_req_width) ?
log2_dpte_req_width  626 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 							log2_blk_width : log2_dpte_req_width;
log2_dpte_req_width  658 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_width;
log2_dpte_req_width  402 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int log2_dpte_req_width;
log2_dpte_req_width  469 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	log2_dpte_req_width = 0;
log2_dpte_req_width  497 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	log2_dpte_req_width = log2_vmpg_width + log2_dpte_req_width_ptes;
log2_dpte_req_width  498 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	dpte_req_width = 1 << log2_dpte_req_width;
log2_dpte_req_width  520 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 					(log2_blk_width < log2_dpte_req_width) ?
log2_dpte_req_width  521 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 							log2_blk_width : log2_dpte_req_width;
log2_dpte_req_width  592 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int log2_dpte_req_width;
log2_dpte_req_width  786 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	log2_dpte_req_width = 0;
log2_dpte_req_width  823 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	log2_dpte_req_width = log2_vmpg_width + log2_dpte_req_width_ptes;
log2_dpte_req_width  825 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	dpte_req_width = 1 << log2_dpte_req_width;
log2_dpte_req_width  860 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 					(log2_blk_width < log2_dpte_req_width) ?
log2_dpte_req_width  861 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 							log2_blk_width : log2_dpte_req_width;
log2_dpte_req_width  896 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_width;