log2P             161 drivers/gpu/drm/nouveau/dispnv04/crtc.c 			 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
log2P             164 drivers/gpu/drm/nouveau/dispnv04/crtc.c 			 pv->N1, pv->M1, pv->log2P);
log2P             139 drivers/gpu/drm/nouveau/dispnv04/hw.c 	pllvals->log2P = (pll1 >> 16) & 0x7;
log2P             210 drivers/gpu/drm/nouveau/dispnv04/hw.c 	return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;
log2P             272 drivers/gpu/drm/nouveau/dispnv04/hw.c 	    pv.log2P <= pll_lim.max_p)
log2P             280 drivers/gpu/drm/nouveau/dispnv04/hw.c 	pv.log2P = pll_lim.max_p_usable;
log2P              18 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h 	int log2P;
log2P              43 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c 		pv->log2P = P;
log2P             125 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 		  int *N1, int *M1, int *N2, int *M2, int *log2P)
log2P             138 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);
log2P             151 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	int N1, M1, N2, M2, log2P;
log2P             156 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 				&N1, &M1, &N2, &M2, &log2P);
log2P             161 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 		clk->npll_ctrl = 0x80000100 | (log2P << 16);
log2P             164 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 		clk->npll_ctrl = 0xc0000000 | (log2P << 16);
log2P             171 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 					&N1, &M1, NULL, NULL, &log2P);
log2P             175 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 		clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1;
log2P             151 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	int M1, N1, M2, N2, log2P;
log2P             157 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	for (log2P = 0; clk && log2P < maxlog2P && clk <= (vco2 >> log2P); log2P++)
log2P             159 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	clkP = clk << log2P;
log2P             203 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 				calcclkout = calcclk2 >> log2P;
log2P             215 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 					*pP = log2P;
log2P             150 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1;
log2P             166 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		nvkm_wr32(device, reg, pv->log2P << 16 | (oldpll & 0xffff));
log2P             207 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1;
log2P             292 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 			0xc << 28 | pv->log2P << 16;
log2P             313 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		Pval2 = pv->log2P + info.bias_p;
log2P             379 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	pv.log2P = P;
log2P              41 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c 	int log2P, ret;
log2P              49 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c 	ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);
log2P              53 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c 	ram->ctrl  = 0x80000000 | (log2P << 16);
log2P              54 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c 	ram->ctrl |= min(pll.bias_p + log2P, (int)pll.max_p) << 20;