lofs 764 drivers/gpu/drm/stm/ltdc.c u32 lofs = plane->index * LAY_OFS; lofs 796 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1WHPCR + lofs, lofs 801 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs, lofs 815 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val); lofs 822 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs, lofs 827 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val); lofs 839 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs, lofs 844 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val); lofs 850 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_L1CFBAR + lofs, paddr); lofs 855 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CR + lofs, lofs 876 drivers/gpu/drm/stm/ltdc.c u32 lofs = plane->index * LAY_OFS; lofs 879 drivers/gpu/drm/stm/ltdc.c reg_clear(ldev->regs, LTDC_L1CR + lofs, LXCR_LEN);