loadval            37 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c nv50_dac_sense(struct nvkm_ior *dac, u32 loadval)
loadval            44 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c 	nvkm_wr32(device, 0x61a00c + doff, 0x00100000 | loadval);
loadval            47 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c 	loadval = nvkm_mask(device, 0x61a00c + doff, 0xffffffff, 0x00000000);
loadval            50 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c 	if (!(loadval & 0x80000000))
loadval            53 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c 	return (loadval & 0x38000000) >> 27;
loadval            60 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h 	int (*sense)(struct nvkm_ior *, u32 loadval);