ln1              3064 drivers/gpu/drm/i915/display/intel_ddi.c 	u32 ln0, ln1, lane_mask;
ln1              3070 drivers/gpu/drm/i915/display/intel_ddi.c 	ln1 = I915_READ(MG_DP_MODE(1, port));
ln1              3075 drivers/gpu/drm/i915/display/intel_ddi.c 		ln1 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
ln1              3091 drivers/gpu/drm/i915/display/intel_ddi.c 			ln1 |= MG_DP_MODE_CFG_DP_X1_MODE;
ln1              3094 drivers/gpu/drm/i915/display/intel_ddi.c 			ln1 |= MG_DP_MODE_CFG_DP_X1_MODE |
ln1              3100 drivers/gpu/drm/i915/display/intel_ddi.c 			ln1 |= MG_DP_MODE_CFG_DP_X1_MODE |
ln1              3110 drivers/gpu/drm/i915/display/intel_ddi.c 		ln1 |= MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE;
ln1              3119 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(MG_DP_MODE(1, port), ln1);