lmc_ddr_pll_ctl   667 drivers/edac/thunderx_edac.c 	u64 lmc_control, lmc_ddr_pll_ctl, lmc_config;
lmc_ddr_pll_ctl   701 drivers/edac/thunderx_edac.c 	lmc_ddr_pll_ctl = readq(lmc->regs + LMC_DDR_PLL_CTL);
lmc_ddr_pll_ctl   706 drivers/edac/thunderx_edac.c 					   lmc_ddr_pll_ctl) ?
lmc_ddr_pll_ctl   710 drivers/edac/thunderx_edac.c 					   lmc_ddr_pll_ctl) ?
lmc_ddr_pll_ctl   746 drivers/edac/thunderx_edac.c 	lmc->bank_width = (FIELD_GET(LMC_DDR_PLL_CTL_DDR4, lmc_ddr_pll_ctl) &&