lm_ctl 124 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_hw_ctl *ctl = mixer->lm_ctl; lm_ctl 200 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!mixer[i].hw_lm || !mixer[i].lm_ctl) { lm_ctl 206 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (mixer[i].lm_ctl->ops.clear_all_blendstages) lm_ctl 207 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mixer[i].lm_ctl->ops.clear_all_blendstages( lm_ctl 208 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mixer[i].lm_ctl); lm_ctl 217 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c ctl = mixer[i].lm_ctl; lm_ctl 1109 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c else if (!m->lm_ctl) lm_ctl 1113 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c m->hw_lm->idx - LM_0, m->lm_ctl->idx - CTL_0, lm_ctl 81 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct dpu_hw_ctl *lm_ctl; lm_ctl 1033 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cstate->mixers[i].lm_ctl = hw_ctl[ctl_idx]; lm_ctl 1296 drivers/vme/bridges/vme_ca91cx42.c u32 temp_base, lm_ctl = 0; lm_ctl 1326 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_AS_A16; lm_ctl 1329 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_AS_A24; lm_ctl 1332 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_AS_A32; lm_ctl 1342 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_SUPR; lm_ctl 1344 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_NPRIV; lm_ctl 1346 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_PGM; lm_ctl 1348 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_DATA; lm_ctl 1351 drivers/vme/bridges/vme_ca91cx42.c iowrite32(lm_ctl, bridge->base + LM_CTL); lm_ctl 1364 drivers/vme/bridges/vme_ca91cx42.c u32 lm_ctl, enabled = 0; lm_ctl 1372 drivers/vme/bridges/vme_ca91cx42.c lm_ctl = ioread32(bridge->base + LM_CTL); lm_ctl 1374 drivers/vme/bridges/vme_ca91cx42.c if (lm_ctl & CA91CX42_LM_CTL_EN) lm_ctl 1377 drivers/vme/bridges/vme_ca91cx42.c if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A16) lm_ctl 1379 drivers/vme/bridges/vme_ca91cx42.c if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A24) lm_ctl 1381 drivers/vme/bridges/vme_ca91cx42.c if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A32) lm_ctl 1385 drivers/vme/bridges/vme_ca91cx42.c if (lm_ctl & CA91CX42_LM_CTL_SUPR) lm_ctl 1387 drivers/vme/bridges/vme_ca91cx42.c if (lm_ctl & CA91CX42_LM_CTL_NPRIV) lm_ctl 1389 drivers/vme/bridges/vme_ca91cx42.c if (lm_ctl & CA91CX42_LM_CTL_PGM) lm_ctl 1391 drivers/vme/bridges/vme_ca91cx42.c if (lm_ctl & CA91CX42_LM_CTL_DATA) lm_ctl 1407 drivers/vme/bridges/vme_ca91cx42.c u32 lm_ctl, tmp; lm_ctl 1417 drivers/vme/bridges/vme_ca91cx42.c lm_ctl = ioread32(bridge->base + LM_CTL); lm_ctl 1418 drivers/vme/bridges/vme_ca91cx42.c if ((lm_ctl & (CA91CX42_LM_CTL_PGM | CA91CX42_LM_CTL_DATA)) == 0) { lm_ctl 1441 drivers/vme/bridges/vme_ca91cx42.c if ((lm_ctl & CA91CX42_LM_CTL_EN) == 0) { lm_ctl 1442 drivers/vme/bridges/vme_ca91cx42.c lm_ctl |= CA91CX42_LM_CTL_EN; lm_ctl 1443 drivers/vme/bridges/vme_ca91cx42.c iowrite32(lm_ctl, bridge->base + LM_CTL); lm_ctl 1929 drivers/vme/bridges/vme_tsi148.c u32 lm_base_high, lm_base_low, lm_ctl = 0; lm_ctl 1952 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_AS_A16; lm_ctl 1955 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_AS_A24; lm_ctl 1958 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_AS_A32; lm_ctl 1961 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_AS_A64; lm_ctl 1971 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_SUPR ; lm_ctl 1973 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_NPRIV; lm_ctl 1975 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_PGM; lm_ctl 1977 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_DATA; lm_ctl 1983 drivers/vme/bridges/vme_tsi148.c iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT); lm_ctl 1996 drivers/vme/bridges/vme_tsi148.c u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; lm_ctl 2005 drivers/vme/bridges/vme_tsi148.c lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); lm_ctl 2009 drivers/vme/bridges/vme_tsi148.c if (lm_ctl & TSI148_LCSR_LMAT_EN) lm_ctl 2012 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A16) lm_ctl 2015 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A24) lm_ctl 2018 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A32) lm_ctl 2021 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A64) lm_ctl 2025 drivers/vme/bridges/vme_tsi148.c if (lm_ctl & TSI148_LCSR_LMAT_SUPR) lm_ctl 2027 drivers/vme/bridges/vme_tsi148.c if (lm_ctl & TSI148_LCSR_LMAT_NPRIV) lm_ctl 2029 drivers/vme/bridges/vme_tsi148.c if (lm_ctl & TSI148_LCSR_LMAT_PGM) lm_ctl 2031 drivers/vme/bridges/vme_tsi148.c if (lm_ctl & TSI148_LCSR_LMAT_DATA) lm_ctl 2047 drivers/vme/bridges/vme_tsi148.c u32 lm_ctl, tmp; lm_ctl 2058 drivers/vme/bridges/vme_tsi148.c lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); lm_ctl 2059 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { lm_ctl 2087 drivers/vme/bridges/vme_tsi148.c if ((lm_ctl & TSI148_LCSR_LMAT_EN) == 0) { lm_ctl 2088 drivers/vme/bridges/vme_tsi148.c lm_ctl |= TSI148_LCSR_LMAT_EN; lm_ctl 2089 drivers/vme/bridges/vme_tsi148.c iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT);