lli_dst           808 drivers/dma/ste_dma40.c 	struct d40_phy_lli *lli_dst = desc->lli_phy.dst;
lli_dst           817 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_cfg, base + D40_CHAN_REG_SDCFG);
lli_dst           818 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_elt, base + D40_CHAN_REG_SDELT);
lli_dst           819 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_ptr, base + D40_CHAN_REG_SDPTR);
lli_dst           820 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_lnk, base + D40_CHAN_REG_SDLNK);
lli_dst           310 drivers/dma/ste_dma40_ll.c static void d40_log_lli_link(struct d40_log_lli *lli_dst,
lli_dst           324 drivers/dma/ste_dma40_ll.c 		lli_dst->lcsp13 |= D40_MEM_LCSP1_SCFG_TIM_MASK;
lli_dst           325 drivers/dma/ste_dma40_ll.c 		lli_dst->lcsp13 |= D40_MEM_LCSP3_DTCP_MASK;
lli_dst           331 drivers/dma/ste_dma40_ll.c 	lli_dst->lcsp13 = (lli_dst->lcsp13 & ~D40_MEM_LCSP1_SLOS_MASK) |
lli_dst           336 drivers/dma/ste_dma40_ll.c 			   struct d40_log_lli *lli_dst,
lli_dst           340 drivers/dma/ste_dma40_ll.c 	d40_log_lli_link(lli_dst, lli_src, next, flags);
lli_dst           344 drivers/dma/ste_dma40_ll.c 	writel_relaxed(lli_dst->lcsp02, &lcpa[0].lcsp2);
lli_dst           345 drivers/dma/ste_dma40_ll.c 	writel_relaxed(lli_dst->lcsp13, &lcpa[0].lcsp3);
lli_dst           349 drivers/dma/ste_dma40_ll.c 			   struct d40_log_lli *lli_dst,
lli_dst           353 drivers/dma/ste_dma40_ll.c 	d40_log_lli_link(lli_dst, lli_src, next, flags);
lli_dst           357 drivers/dma/ste_dma40_ll.c 	writel_relaxed(lli_dst->lcsp02, &lcla[1].lcsp02);
lli_dst           358 drivers/dma/ste_dma40_ll.c 	writel_relaxed(lli_dst->lcsp13, &lcla[1].lcsp13);
lli_dst           461 drivers/dma/ste_dma40_ll.h 			    struct d40_log_lli *lli_dst,
lli_dst           466 drivers/dma/ste_dma40_ll.h 			    struct d40_log_lli *lli_dst,