link_clock 973 drivers/gpu/drm/gma500/cdv_intel_dp.c int link_clock, link_clock 978 drivers/gpu/drm/gma500/cdv_intel_dp.c m_n->gmch_n = link_clock * nlanes; link_clock 981 drivers/gpu/drm/gma500/cdv_intel_dp.c m_n->link_n = link_clock; link_clock 1492 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock; link_clock 1495 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = cnl_calc_wrpll_link(dev_priv, pll_state); link_clock 1501 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = icl_calc_tbt_pll_link(dev_priv, port); link_clock 1503 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = icl_calc_mg_pll_link(dev_priv, pll_state); link_clock 1506 drivers/gpu/drm/i915/display/intel_ddi.c pipe_config->port_clock = link_clock; link_clock 1516 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock; link_clock 1519 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = cnl_calc_wrpll_link(dev_priv, pll_state); link_clock 1521 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = pll_state->cfgcr0 & DPLL_CFGCR0_LINK_RATE_MASK; link_clock 1523 drivers/gpu/drm/i915/display/intel_ddi.c switch (link_clock) { link_clock 1525 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 81000; link_clock 1528 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 108000; link_clock 1531 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 135000; link_clock 1534 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 162000; link_clock 1537 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 216000; link_clock 1540 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 270000; link_clock 1543 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 324000; link_clock 1546 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 405000; link_clock 1552 drivers/gpu/drm/i915/display/intel_ddi.c link_clock *= 2; link_clock 1555 drivers/gpu/drm/i915/display/intel_ddi.c pipe_config->port_clock = link_clock; link_clock 1564 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock; link_clock 1571 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = skl_calc_wrpll_link(pll_state); link_clock 1573 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = pll_state->ctrl1 & DPLL_CTRL1_LINK_RATE_MASK(0); link_clock 1574 drivers/gpu/drm/i915/display/intel_ddi.c link_clock >>= DPLL_CTRL1_LINK_RATE_SHIFT(0); link_clock 1576 drivers/gpu/drm/i915/display/intel_ddi.c switch (link_clock) { link_clock 1578 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 81000; link_clock 1581 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 108000; link_clock 1584 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 135000; link_clock 1587 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 162000; link_clock 1590 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 216000; link_clock 1593 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 270000; link_clock 1599 drivers/gpu/drm/i915/display/intel_ddi.c link_clock *= 2; link_clock 1602 drivers/gpu/drm/i915/display/intel_ddi.c pipe_config->port_clock = link_clock; link_clock 1611 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock = 0; link_clock 1617 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 81000; link_clock 1620 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 135000; link_clock 1623 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 270000; link_clock 1626 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL(0)); link_clock 1629 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL(1)); link_clock 1634 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 81000; link_clock 1636 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 135000; link_clock 1638 drivers/gpu/drm/i915/display/intel_ddi.c link_clock = 270000; link_clock 1649 drivers/gpu/drm/i915/display/intel_ddi.c pipe_config->port_clock = link_clock * 2; link_clock 2586 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock, link_clock 2662 drivers/gpu/drm/i915/display/intel_ddi.c if (link_clock < 300000) link_clock 2673 drivers/gpu/drm/i915/display/intel_ddi.c if (link_clock <= 500000) { link_clock 2683 drivers/gpu/drm/i915/display/intel_ddi.c if (link_clock <= 500000) { link_clock 2705 drivers/gpu/drm/i915/display/intel_ddi.c int link_clock, link_clock 2715 drivers/gpu/drm/i915/display/intel_ddi.c icl_mg_phy_ddi_vswing_sequence(encoder, link_clock, level); link_clock 7525 drivers/gpu/drm/i915/display/intel_display.c int pixel_clock, int link_clock, link_clock 7536 drivers/gpu/drm/i915/display/intel_display.c link_clock * nlanes * 8, link_clock 7540 drivers/gpu/drm/i915/display/intel_display.c compute_m_n(pixel_clock, link_clock, link_clock 415 drivers/gpu/drm/i915/display/intel_display.h int pixel_clock, int link_clock, link_clock 503 drivers/gpu/drm/i915/display/intel_dp.c static u16 intel_dp_dsc_get_output_bpp(u32 link_clock, u32 lane_count, link_clock 515 drivers/gpu/drm/i915/display/intel_dp.c bits_per_pixel = (link_clock * lane_count * 8) / link_clock 1950 drivers/gpu/drm/i915/display/intel_dp.c int mode_rate, link_clock, link_avail; link_clock 1962 drivers/gpu/drm/i915/display/intel_dp.c link_clock = intel_dp->common_rates[clock]; link_clock 1963 drivers/gpu/drm/i915/display/intel_dp.c link_avail = intel_dp_max_data_rate(link_clock, link_clock 1969 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->port_clock = link_clock;