linesz 485 arch/mips/include/asm/cpu-features.h #define cpu_dcache_line_size() cpu_data[0].dcache.linesz linesz 488 arch/mips/include/asm/cpu-features.h #define cpu_icache_line_size() cpu_data[0].icache.linesz linesz 491 arch/mips/include/asm/cpu-features.h #define cpu_scache_line_size() cpu_data[0].scache.linesz linesz 494 arch/mips/include/asm/cpu-features.h #define cpu_tcache_line_size() cpu_data[0].tcache.linesz linesz 27 arch/mips/include/asm/cpu-info.h unsigned char linesz; /* Size of line in bytes */ linesz 12 arch/mips/kernel/cacheinfo.c leaf->coherency_line_size = c->cache.linesz; \ linesz 15 arch/mips/kernel/cacheinfo.c leaf->size = c->cache.linesz * c->cache.sets * \ linesz 221 arch/mips/kernel/pm-cps.c uasm_i_addiu(pp, t0, t0, cache->linesz); linesz 223 arch/mips/kernel/pm-cps.c uasm_i_cache(pp, op, i * cache->linesz, t0); linesz 229 arch/mips/kernel/pm-cps.c uasm_i_addiu(pp, t0, t0, unroll_lines * cache->linesz); linesz 244 arch/mips/kernel/pm-cps.c unsigned line_size = cpu_info->dcache.linesz; linesz 639 arch/mips/kernel/traps.c regs->regs[rt] = min(current_cpu_data.dcache.linesz, linesz 640 arch/mips/kernel/traps.c current_cpu_data.icache.linesz); linesz 2533 arch/mips/kvm/emulate.c arch->gprs[rt] = min(current_cpu_data.dcache.linesz, linesz 2534 arch/mips/kvm/emulate.c current_cpu_data.icache.linesz); linesz 180 arch/mips/mm/c-octeon.c c->icache.linesz = 2 << ((config1 >> 19) & 7); linesz 185 arch/mips/mm/c-octeon.c c->icache.sets * c->icache.ways * c->icache.linesz; linesz 187 arch/mips/mm/c-octeon.c c->dcache.linesz = 128; linesz 194 arch/mips/mm/c-octeon.c c->dcache.sets * c->dcache.ways * c->dcache.linesz; linesz 200 arch/mips/mm/c-octeon.c c->icache.linesz = 2 << ((config1 >> 19) & 7); linesz 204 arch/mips/mm/c-octeon.c icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; linesz 206 arch/mips/mm/c-octeon.c c->dcache.linesz = 128; linesz 209 arch/mips/mm/c-octeon.c dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; linesz 214 arch/mips/mm/c-octeon.c c->icache.linesz = 128; linesz 218 arch/mips/mm/c-octeon.c icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; linesz 220 arch/mips/mm/c-octeon.c c->dcache.linesz = 128; linesz 223 arch/mips/mm/c-octeon.c dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; linesz 236 arch/mips/mm/c-octeon.c c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways); linesz 237 arch/mips/mm/c-octeon.c c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways); linesz 245 arch/mips/mm/c-octeon.c c->icache.ways, c->icache.sets, c->icache.linesz); linesz 250 arch/mips/mm/c-octeon.c c->dcache.sets, c->dcache.linesz); linesz 1089 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1094 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1103 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1108 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1117 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1122 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1137 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1142 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1154 arch/mips/mm/c-r4k.c c->icache.linesz = 64; linesz 1159 arch/mips/mm/c-r4k.c c->dcache.linesz = 32; linesz 1181 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1186 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1198 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1203 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1214 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1219 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1229 arch/mips/mm/c-r4k.c c->icache.linesz = 16 << ((config & CONF_IB) >> 5); linesz 1237 arch/mips/mm/c-r4k.c c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); linesz 1249 arch/mips/mm/c-r4k.c c->icache.linesz = 2 << lsize; linesz 1251 arch/mips/mm/c-r4k.c c->icache.linesz = 0; linesz 1256 arch/mips/mm/c-r4k.c c->icache.linesz; linesz 1261 arch/mips/mm/c-r4k.c c->dcache.linesz = 2 << lsize; linesz 1263 arch/mips/mm/c-r4k.c c->dcache.linesz = 0; linesz 1268 arch/mips/mm/c-r4k.c c->dcache.linesz; linesz 1276 arch/mips/mm/c-r4k.c c->icache.linesz = 128; linesz 1280 arch/mips/mm/c-r4k.c icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; linesz 1282 arch/mips/mm/c-r4k.c c->dcache.linesz = 128; linesz 1285 arch/mips/mm/c-r4k.c dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; linesz 1305 arch/mips/mm/c-r4k.c c->icache.linesz = lsize ? 2 << lsize : 0; linesz 1312 arch/mips/mm/c-r4k.c c->icache.linesz; linesz 1329 arch/mips/mm/c-r4k.c c->dcache.linesz = lsize ? 2 << lsize : 0; linesz 1336 arch/mips/mm/c-r4k.c c->dcache.linesz; linesz 1353 arch/mips/mm/c-r4k.c !(config & CONF_SC) && c->icache.linesz != 16 && linesz 1361 arch/mips/mm/c-r4k.c c->icache.sets = c->icache.linesz ? linesz 1362 arch/mips/mm/c-r4k.c icache_size / (c->icache.linesz * c->icache.ways) : 0; linesz 1363 arch/mips/mm/c-r4k.c c->dcache.sets = c->dcache.linesz ? linesz 1364 arch/mips/mm/c-r4k.c dcache_size / (c->dcache.linesz * c->dcache.ways) : 0; linesz 1466 arch/mips/mm/c-r4k.c way_string[c->icache.ways], c->icache.linesz); linesz 1473 arch/mips/mm/c-r4k.c c->dcache.linesz); linesz 1486 arch/mips/mm/c-r4k.c c->vcache.linesz = 2 << lsize; linesz 1488 arch/mips/mm/c-r4k.c c->vcache.linesz = lsize; linesz 1493 arch/mips/mm/c-r4k.c vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz; linesz 1499 arch/mips/mm/c-r4k.c vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz); linesz 1556 arch/mips/mm/c-r4k.c c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22); linesz 1568 arch/mips/mm/c-r4k.c c->scache.linesz = 32; linesz 1572 arch/mips/mm/c-r4k.c c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); linesz 1574 arch/mips/mm/c-r4k.c scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); linesz 1587 arch/mips/mm/c-r4k.c c->scache.linesz = 2 << lsize; linesz 1589 arch/mips/mm/c-r4k.c c->scache.linesz = 0; linesz 1595 arch/mips/mm/c-r4k.c c->scache.linesz; linesz 1601 arch/mips/mm/c-r4k.c scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); linesz 1637 arch/mips/mm/c-r4k.c c->scache.linesz = 64 << ((config >> 13) & 1); linesz 1675 arch/mips/mm/c-r4k.c scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; linesz 1678 arch/mips/mm/c-r4k.c way_string[c->scache.ways], c->scache.linesz); linesz 1695 arch/mips/mm/c-r4k.c c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); linesz 1698 arch/mips/mm/c-r4k.c scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); linesz 1848 arch/mips/mm/c-r4k.c if (c->dcache.linesz && cpu_has_dc_aliases) linesz 1850 arch/mips/mm/c-r4k.c c->dcache.sets * c->dcache.linesz - 1, linesz 304 arch/mips/mm/c-tx39.c current_cpu_data.icache.linesz = 16; linesz 309 arch/mips/mm/c-tx39.c current_cpu_data.dcache.linesz = 4; linesz 315 arch/mips/mm/c-tx39.c current_cpu_data.dcache.linesz = 16; linesz 322 arch/mips/mm/c-tx39.c current_cpu_data.dcache.linesz = 16; linesz 401 arch/mips/mm/c-tx39.c current_cpu_data.icache.waysize / current_cpu_data.icache.linesz; linesz 403 arch/mips/mm/c-tx39.c current_cpu_data.dcache.waysize / current_cpu_data.dcache.linesz; linesz 412 arch/mips/mm/c-tx39.c icache_size >> 10, current_cpu_data.icache.linesz); linesz 414 arch/mips/mm/c-tx39.c dcache_size >> 10, current_cpu_data.dcache.linesz); linesz 144 arch/mips/mm/sc-mips.c c->scache.linesz = 2 << tmp; linesz 167 arch/mips/mm/sc-mips.c c->scache.linesz = 2 << line_sz; linesz 172 arch/mips/mm/sc-mips.c c->scache.waysize = c->scache.sets * c->scache.linesz; linesz 175 arch/mips/mm/sc-mips.c if (c->scache.linesz) { linesz 245 arch/mips/mm/sc-mips.c c->scache.waysize = c->scache.sets * c->scache.linesz; linesz 237 arch/mips/mm/sc-rm7k.c c->scache.linesz = sc_lsize; linesz 241 arch/mips/mm/sc-rm7k.c c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); linesz 267 arch/mips/mm/sc-rm7k.c c->tcache.linesz = tc_lsize; linesz 155 arch/mips/txx9/generic/setup.c unsigned int linesz = 32; linesz 160 arch/mips/txx9/generic/setup.c for (addr = INDEX_BASE; addr < end; addr += linesz) { linesz 204 arch/mips/txx9/generic/setup.c unsigned int linesz = 16; linesz 209 arch/mips/txx9/generic/setup.c for (addr = INDEX_BASE; addr < end; addr += linesz) { linesz 24 arch/sh/include/asm/cache.h unsigned int linesz; /* Cache line size (bytes) */ linesz 155 arch/sh/kernel/cpu/init.c addr += current_cpu_data.dcache.linesz) linesz 200 arch/sh/kernel/cpu/init.c CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways) linesz 307 arch/sh/kernel/cpu/init.c current_cpu_data.icache.linesz; linesz 310 arch/sh/kernel/cpu/init.c current_cpu_data.icache.linesz; linesz 314 arch/sh/kernel/cpu/init.c current_cpu_data.dcache.linesz; linesz 317 arch/sh/kernel/cpu/init.c current_cpu_data.dcache.linesz; linesz 71 arch/sh/kernel/cpu/proc.c cache_size = info.ways * info.sets * info.linesz; linesz 38 arch/sh/kernel/cpu/sh2/probe.c boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; linesz 59 arch/sh/kernel/cpu/sh2/probe.c boot_cpu_data.dcache.linesz = 32; linesz 47 arch/sh/kernel/cpu/sh2a/probe.c boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; linesz 52 arch/sh/kernel/cpu/sh3/probe.c boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; linesz 39 arch/sh/kernel/cpu/sh4/probe.c boot_cpu_data.icache.linesz = L1_CACHE_BYTES; linesz 48 arch/sh/kernel/cpu/sh4/probe.c boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; linesz 245 arch/sh/kernel/cpu/sh4/probe.c boot_cpu_data.scache.linesz = L1_CACHE_BYTES; linesz 249 arch/sh/kernel/cpu/sh4/probe.c boot_cpu_data.scache.linesz); linesz 252 arch/sh/kernel/cpu/sh4/probe.c (boot_cpu_data.scache.linesz * linesz 257 arch/sh/kernel/cpu/sh4/probe.c boot_cpu_data.scache.linesz); linesz 41 arch/sh/kernel/cpu/sh5/probe.c boot_cpu_data.icache.linesz = L1_CACHE_BYTES; linesz 45 arch/sh/kernel/cpu/sh5/probe.c boot_cpu_data.icache.linesz; linesz 76 arch/sh/mm/cache-debugfs.c addr += cache->linesz, line++) { linesz 47 arch/sh/mm/cache-sh7705.c addr += current_cpu_data.dcache.linesz) { linesz 115 arch/sh/mm/cache-sh7705.c addr += current_cpu_data.dcache.linesz) { linesz 227 drivers/soc/bcm/brcmstb/pm/pm-mips.c brcm_pm_do_s3(ctrl.aon_ctrl_base, current_cpu_data.dcache.linesz); linesz 270 drivers/soc/bcm/brcmstb/pm/pm-mips.c s2_params[3] = (u32)current_cpu_data.icache.linesz; linesz 802 tools/perf/ui/stdio/hist.c size_t linesz; linesz 819 tools/perf/ui/stdio/hist.c linesz = hists__sort_list_width(hists) + 3 + 1; linesz 820 tools/perf/ui/stdio/hist.c linesz += perf_hpp__color_overhead(); linesz 821 tools/perf/ui/stdio/hist.c line = malloc(linesz); linesz 841 tools/perf/ui/stdio/hist.c ret += hist_entry__fprintf(h, max_cols, line, linesz, fp, ignore_callchains); linesz 72 tools/perf/util/namespaces.c size_t linesz = 0; linesz 106 tools/perf/util/namespaces.c while (getline(&statln, &linesz, f) != -1) {