line_buffer_prefetch  396 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 		DC_LOG_BANDWIDTH_CALCS("	[bool] line_buffer_prefetch[%d]:%d", i, data->line_buffer_prefetch[i]);
line_buffer_prefetch  808 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->line_buffer_prefetch[i] = 0;
line_buffer_prefetch  811 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->line_buffer_prefetch[i] = 1;
line_buffer_prefetch  814 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->line_buffer_prefetch[i] = 0;
line_buffer_prefetch  817 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			if (data->line_buffer_prefetch[i] == 1) {
line_buffer_prefetch  838 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			if (data->line_buffer_prefetch[i] == 1 || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(2)) || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(4))) {
line_buffer_prefetch 1309 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_int_to_fixed(1 + data->line_buffer_prefetch[i]), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
line_buffer_prefetch  373 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	bool line_buffer_prefetch[maximum_number_of_surfaces];