lhdr 307 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c struct acr_r352_lsf_lsb_header *lhdr = &img->lsb_header; lhdr 323 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c offset += sizeof(*lhdr); lhdr 330 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c _img->ucode_off = lhdr->ucode_off = offset; lhdr 341 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->bl_code_size = ALIGN(desc->bootloader_size, lhdr 343 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->ucode_size = ALIGN(desc->app_resident_data_offset, lhdr 344 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c LSF_BL_CODE_SIZE_ALIGN) + lhdr->bl_code_size; lhdr 345 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->data_size = ALIGN(desc->app_size, LSF_BL_CODE_SIZE_ALIGN) + lhdr 346 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->bl_code_size - lhdr->ucode_size; lhdr 352 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->bl_imem_off = desc->bootloader_imem_offset; lhdr 353 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->app_code_off = desc->app_start_offset + lhdr 355 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->app_code_size = desc->app_resident_code_size; lhdr 356 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->app_data_off = desc->app_start_offset + lhdr 358 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->app_data_size = desc->app_resident_data_size; lhdr 360 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->flags = func->lhdr_flags; lhdr 362 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->flags |= LSF_FLAG_DMACTL_REQ_CTX; lhdr 365 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->bl_data_size = ALIGN(func->bl_desc_size, LSF_BL_DATA_SIZE_ALIGN); lhdr 371 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c lhdr->bl_data_off = offset; lhdr 372 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c offset += lhdr->bl_data_size; lhdr 165 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c struct acr_r367_lsf_lsb_header *lhdr = &img->lsb_header; lhdr 172 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c whdr->bin_version = lhdr->signature.version; lhdr 182 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c offset += sizeof(*lhdr); lhdr 189 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c _img->ucode_off = lhdr->ucode_off = offset; lhdr 200 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->bl_code_size = ALIGN(desc->bootloader_size, lhdr 202 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->ucode_size = ALIGN(desc->app_resident_data_offset, lhdr 203 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c LSF_BL_CODE_SIZE_ALIGN) + lhdr->bl_code_size; lhdr 204 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->data_size = ALIGN(desc->app_size, LSF_BL_CODE_SIZE_ALIGN) + lhdr 205 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->bl_code_size - lhdr->ucode_size; lhdr 211 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->bl_imem_off = desc->bootloader_imem_offset; lhdr 212 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->app_code_off = desc->app_start_offset + lhdr 214 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->app_code_size = desc->app_resident_code_size; lhdr 215 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->app_data_off = desc->app_start_offset + lhdr 217 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->app_data_size = desc->app_resident_data_size; lhdr 219 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->flags = func->lhdr_flags; lhdr 221 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->flags |= LSF_FLAG_DMACTL_REQ_CTX; lhdr 224 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->bl_data_size = ALIGN(func->bl_desc_size, LSF_BL_DATA_SIZE_ALIGN); lhdr 230 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c lhdr->bl_data_off = offset; lhdr 231 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c offset += lhdr->bl_data_size; lhdr 56 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c struct hsf_load_header *lhdr; lhdr 78 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr = scrub_image + fw_hdr->hdr_offset; lhdr 81 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c nvkm_falcon_load_imem(falcon, scrub_data, lhdr->non_sec_code_off, lhdr 82 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr->non_sec_code_size, lhdr 83 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr->non_sec_code_off >> 8, 0, false); lhdr 84 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c nvkm_falcon_load_imem(falcon, scrub_data + lhdr->apps[0], lhdr 85 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c ALIGN(lhdr->apps[0], 0x100), lhdr 86 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr->apps[1], lhdr 87 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr->apps[0] >> 8, 0, true); lhdr 88 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c nvkm_falcon_load_dmem(falcon, scrub_data + lhdr->data_dma_base, 0, lhdr 89 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c lhdr->data_size, 0); lhdr 655 fs/xfs/xfs_log_cil.c struct xfs_log_iovec lhdr; lhdr 797 fs/xfs/xfs_log_cil.c lhdr.i_addr = &thdr; lhdr 798 fs/xfs/xfs_log_cil.c lhdr.i_len = sizeof(xfs_trans_header_t); lhdr 799 fs/xfs/xfs_log_cil.c lhdr.i_type = XLOG_REG_TYPE_TRANSHDR; lhdr 800 fs/xfs/xfs_log_cil.c tic->t_curr_res -= lhdr.i_len + sizeof(xlog_op_header_t); lhdr 803 fs/xfs/xfs_log_cil.c lvhdr.lv_iovecp = &lhdr;