lfrac             522 arch/mips/ath79/clock.c 	u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv;
lfrac             555 arch/mips/ath79/clock.c 	lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) &
lfrac             559 arch/mips/ath79/clock.c 	cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13);
lfrac             573 arch/mips/ath79/clock.c 	lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) &
lfrac             577 arch/mips/ath79/clock.c 	ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13);