ldr 217 arch/arm/include/asm/assembler.h ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count ldr 223 arch/arm/include/asm/assembler.h ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count ldr 438 arch/arm/include/asm/assembler.h usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort ldr 88 arch/arm/include/asm/futex.h "1: " TUSER(ldr) " %1, [%3]\n" \ ldr 114 arch/arm/include/asm/futex.h "1: " TUSER(ldr) " %1, [%4]\n" ldr 21 arch/arm/include/asm/tls.h ldr \tmp1, =elf_hwcap ldr 22 arch/arm/include/asm/tls.h ldr \tmp1, [\tmp1, #0] ldr 87 arch/arm/include/asm/uaccess-asm.h ldr \tmp1, [\tsk, #TI_ADDR_LIMIT] ldr 109 arch/arm/include/asm/uaccess-asm.h ldr \tmp1, [sp, #SVC_ADDR_LIMIT] ldr 110 arch/arm/include/asm/uaccess-asm.h DACR( ldr \tmp0, [sp, #SVC_DACR]) ldr 378 arch/arm/include/asm/uaccess.h __get_user_asm(x, addr, err, ldr) ldr 29 arch/arm/include/asm/vfpmacros.h ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr 30 arch/arm/include/asm/vfpmacros.h ldr \tmp, [\tmp, #0] ldr 53 arch/arm/include/asm/vfpmacros.h ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr 54 arch/arm/include/asm/vfpmacros.h ldr \tmp, [\tmp, #0] ldr 27 arch/arm/kernel/module-plts.c u32 ldr[PLT_ENT_COUNT]; ldr 54 arch/arm/kernel/module-plts.c return (u32)&plt->ldr[idx]; ldr 73 arch/arm/kernel/module-plts.c return (u32)&plt->ldr[idx]; ldr 71 arch/arm/lib/bitops.h ldr r2, [r1, r0, lsl #2] ldr 96 arch/arm/lib/bitops.h ldr r2, [r1, r0, lsl #2]! ldr 45 arch/arm/mach-tegra/sleep.h 1001: ldr \tmp, [\base] ldr 111 arch/arm/mach-tegra/sleep.h ldr \tmp1, [\tmp1, #APB_MISC_GP_HIDREV] ldr 28 arch/arm64/include/asm/asm-uaccess.h ldr \tmp1, [\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1 ldr 216 arch/arm64/include/asm/assembler.h ldr \dst, [\dst, :lo12:\sym] ldr 219 arch/arm64/include/asm/assembler.h ldr \dst, [\tmp, :lo12:\sym] ldr 262 arch/arm64/include/asm/assembler.h ldr \dst, [\dst, \tmp] ldr 269 arch/arm64/include/asm/assembler.h ldr \rd, [\rn, #VMA_VM_MM] ldr 276 arch/arm64/include/asm/assembler.h ldr \rd, [\rn, #MM_CONTEXT_ID] ldr 733 arch/arm64/include/asm/assembler.h ldr x0, [x0, #TSK_TI_PREEMPT] ldr 62 arch/arm64/include/asm/fpsimdmacros.h ldr w\tmpnr, [\state, #16 * 2] ldr 64 arch/arm64/include/asm/fpsimdmacros.h ldr w\tmpnr, [\state, #16 * 2 + 4] ldr 212 arch/arm64/include/asm/fpsimdmacros.h ldr w\nxtmp, [\xpfpsr] ldr 214 arch/arm64/include/asm/fpsimdmacros.h ldr w\nxtmp, [\xpfpsr, #4] ldr 102 arch/arm64/include/asm/kvm_asm.h ldr \reg, [\reg, \tmp] ldr 112 arch/arm64/include/asm/kvm_asm.h ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU] ldr 77 arch/arm64/include/asm/kvm_ptrauth.h ldr \reg1, [\g_ctxt, #(VCPU_HCR_EL2 - VCPU_CONTEXT)] ldr 93 arch/arm64/include/asm/kvm_ptrauth.h ldr \reg1, [\g_ctxt, #(VCPU_HCR_EL2 - VCPU_CONTEXT)] ldr 240 arch/x86/include/asm/apicdef.h } ldr; ldr 196 arch/x86/kvm/lapic.c u32 ldr; ldr 220 arch/x86/kvm/lapic.c ldr = kvm_lapic_get_reg(apic, APIC_LDR); ldr 224 arch/x86/kvm/lapic.c } else if (ldr) { ldr 225 arch/x86/kvm/lapic.c ldr = GET_APIC_LOGICAL_ID(ldr); ldr 232 arch/x86/kvm/lapic.c if (!kvm_apic_map_get_logical_dest(new, ldr, &cluster, &mask)) ldr 286 arch/x86/kvm/lapic.c u32 ldr = kvm_apic_calc_x2apic_ldr(id); ldr 291 arch/x86/kvm/lapic.c kvm_lapic_set_reg(apic, APIC_LDR, ldr); ldr 2406 arch/x86/kvm/lapic.c u32 *ldr = (u32 *)(s->regs + APIC_LDR); ldr 2420 arch/x86/kvm/lapic.c *ldr = kvm_apic_calc_x2apic_ldr(*id); ldr 4583 arch/x86/kvm/svm.c static u32 *avic_get_logical_id_entry(struct kvm_vcpu *vcpu, u32 ldr, bool flat) ldr 4588 arch/x86/kvm/svm.c int dlid = GET_APIC_LOGICAL_ID(ldr); ldr 4612 arch/x86/kvm/svm.c static int avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ldr) ldr 4618 arch/x86/kvm/svm.c entry = avic_get_logical_id_entry(vcpu, ldr, flat); ldr 4645 arch/x86/kvm/svm.c u32 ldr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LDR); ldr 4648 arch/x86/kvm/svm.c if (ldr == svm->ldr_reg) ldr 4653 arch/x86/kvm/svm.c if (ldr) ldr 4654 arch/x86/kvm/svm.c ret = avic_ldr_write(vcpu, id, ldr); ldr 4657 arch/x86/kvm/svm.c svm->ldr_reg = ldr; ldr 1078 drivers/infiniband/hw/hfi1/chip.c static void read_link_down_reason(struct hfi1_devdata *dd, u8 *ldr); ldr 9035 drivers/infiniband/hw/hfi1/chip.c static void read_link_down_reason(struct hfi1_devdata *dd, u8 *ldr) ldr 9040 drivers/infiniband/hw/hfi1/chip.c *ldr = (frame & 0xff); ldr 87 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_preprocess(&timings->ldr, unit); ldr 119 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); ldr 296 drivers/media/rc/img-ir/img-ir-hw.c regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, ldr 383 drivers/media/rc/img-ir/img-ir-hw.c img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); ldr 390 drivers/media/rc/img-ir/img-ir-hw.c regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); ldr 97 drivers/media/rc/img-ir/img-ir-hw.h struct img_ir_symbol_timing ldr, s00, s01, s10, s11; ldr 125 drivers/media/rc/img-ir/img-ir-hw.h u32 ldr, s00, s01, s10, s11, ft; ldr 60 drivers/media/rc/img-ir/img-ir-jvc.c .ldr = { ldr 136 drivers/media/rc/img-ir/img-ir-nec.c .ldr = { ldr 161 drivers/media/rc/img-ir/img-ir-nec.c .ldr = { ldr 88 drivers/media/rc/img-ir/img-ir-rc6.c .ldr = { ldr 88 drivers/media/rc/img-ir/img-ir-sanyo.c .ldr = { ldr 113 drivers/media/rc/img-ir/img-ir-sanyo.c .ldr = { ldr 137 drivers/media/rc/img-ir/img-ir-sony.c .ldr = { ldr 4324 drivers/net/wireless/atmel/atmel.c ldr r0, =SPI_CGEN_BASE ldr 4329 drivers/net/wireless/atmel/atmel.c ldr r1, [r0, #28] ldr 4335 drivers/net/wireless/atmel/atmel.c ldr r0, =MRBASE ldr 4348 drivers/net/wireless/atmel/atmel.c ldr r0, =MRBASE ldr 4349 drivers/net/wireless/atmel/atmel.c ldr r1, =MAC_ADDRESS_MIB ldr 4351 drivers/net/wireless/atmel/atmel.c ldr r1, =NVRAM_IMAGE ldr 4362 drivers/net/wireless/atmel/atmel.c ldr r0, =NVRAM_IMAGE ldr 4374 drivers/net/wireless/atmel/atmel.c ldr r0, =MAC_ADDRESS_MIB ldr 4394 drivers/net/wireless/atmel/atmel.c ldr r0, =SP_BASE ldr 4403 drivers/net/wireless/atmel/atmel.c ldr r3, =SPI_CGEN_BASE ldr 4404 drivers/net/wireless/atmel/atmel.c ldr r1, [r3, #28] ldr 4408 drivers/net/wireless/atmel/atmel.c ldr r1, =0x2000c01 ldr 4410 drivers/net/wireless/atmel/atmel.c ldr r1, =0x2000201 ldr 4414 drivers/net/wireless/atmel/atmel.c ldr r1, [r0, #SP_SR] ldr 4415 drivers/net/wireless/atmel/atmel.c ldr r0, [r0, #SP_RDR] ldr 4420 drivers/net/wireless/atmel/atmel.c ldr r1, =SP_BASE ldr 4421 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_RDR] ldr 4425 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_SR] ldr 4432 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_SR] ldr 4436 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_RDR] ldr 4438 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_SR] ldr 4442 drivers/net/wireless/atmel/atmel.c ldr r0, [r1, #SP_RDR] ldr 4459 drivers/net/wireless/atmel/atmel.c ldr r1, =NVRAM_SCRATCH ldr 4479 drivers/net/wireless/atmel/atmel.c ldr r4, =SP_BASE ldr 4483 drivers/net/wireless/atmel/atmel.c ldr r5, =NVRAM_SCRATCH ldr 4488 drivers/net/wireless/atmel/atmel.c ldr r6, [r4, #SP_SR] ldr 4497 drivers/net/wireless/atmel/atmel.c ldr r0, [r4, #SP_RDR] ldr 4499 drivers/net/wireless/atmel/atmel.c ldr r0, [r4, #SP_SR] ldr 4502 drivers/net/wireless/atmel/atmel.c ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */ ldr 4507 drivers/net/wireless/atmel/atmel.c ldr r5, [r4, #SP_SR] ldr 4512 drivers/net/wireless/atmel/atmel.c ldr r5, [r4, #SP_SR] ldr 4515 drivers/net/wireless/atmel/atmel.c ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */