lbr_nr            490 arch/x86/events/core.c 		if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2)
lbr_nr           1383 arch/x86/events/core.c 		if (x86_pmu.lbr_nr) {
lbr_nr           2322 arch/x86/events/intel/core.c 	if (x86_pmu.lbr_nr) {
lbr_nr           4061 arch/x86/events/intel/core.c 	unsigned long lbr_from_nr = x86_pmu.lbr_from + x86_pmu.lbr_nr;
lbr_nr           4390 arch/x86/events/intel/core.c 	return snprintf(buf, PAGE_SIZE, "%d\n", x86_pmu.lbr_nr);
lbr_nr           4441 arch/x86/events/intel/core.c 	return x86_pmu.lbr_nr ? attr->mode : 0;
lbr_nr           5134 arch/x86/events/intel/core.c 	if (x86_pmu.lbr_nr && !check_msr(x86_pmu.lbr_tos, 0x3UL))
lbr_nr           5135 arch/x86/events/intel/core.c 		x86_pmu.lbr_nr = 0;
lbr_nr           5136 arch/x86/events/intel/core.c 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
lbr_nr           5139 arch/x86/events/intel/core.c 			x86_pmu.lbr_nr = 0;
lbr_nr           5142 arch/x86/events/intel/core.c 	if (x86_pmu.lbr_nr)
lbr_nr           5143 arch/x86/events/intel/core.c 		pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);
lbr_nr            956 arch/x86/events/intel/ds.c 		sz += x86_pmu.lbr_nr * sizeof(struct pebs_lbr_entry);
lbr_nr           1005 arch/x86/events/intel/ds.c 			((x86_pmu.lbr_nr-1) << PEBS_DATACFG_LBR_SHIFT);
lbr_nr            201 arch/x86/events/intel/lbr.c 	for (i = 0; i < x86_pmu.lbr_nr; i++)
lbr_nr            209 arch/x86/events/intel/lbr.c 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
lbr_nr            221 arch/x86/events/intel/lbr.c 	if (!x86_pmu.lbr_nr)
lbr_nr            366 arch/x86/events/intel/lbr.c 	mask = x86_pmu.lbr_nr - 1;
lbr_nr            376 arch/x86/events/intel/lbr.c 	for (; i < x86_pmu.lbr_nr; i++) {
lbr_nr            400 arch/x86/events/intel/lbr.c 	mask = x86_pmu.lbr_nr - 1;
lbr_nr            402 arch/x86/events/intel/lbr.c 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
lbr_nr            462 arch/x86/events/intel/lbr.c 	if (!x86_pmu.lbr_nr)
lbr_nr            503 arch/x86/events/intel/lbr.c 	if (!x86_pmu.lbr_nr)
lbr_nr            538 arch/x86/events/intel/lbr.c 	unsigned long mask = x86_pmu.lbr_nr - 1;
lbr_nr            542 arch/x86/events/intel/lbr.c 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
lbr_nr            575 arch/x86/events/intel/lbr.c 	unsigned long mask = x86_pmu.lbr_nr - 1;
lbr_nr            580 arch/x86/events/intel/lbr.c 	int num = x86_pmu.lbr_nr;
lbr_nr            802 arch/x86/events/intel/lbr.c 	if (!x86_pmu.lbr_nr)
lbr_nr           1099 arch/x86/events/intel/lbr.c 	cpuc->lbr_stack.nr = x86_pmu.lbr_nr;
lbr_nr           1100 arch/x86/events/intel/lbr.c 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
lbr_nr           1172 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr     = 4;
lbr_nr           1186 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr     = 16;
lbr_nr           1206 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	 = 16;
lbr_nr           1225 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	 = 16;
lbr_nr           1240 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	 = 32;
lbr_nr           1270 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	   = 8;
lbr_nr           1284 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	   = 8;
lbr_nr           1302 arch/x86/events/intel/lbr.c 	x86_pmu.lbr_nr	   = 8;
lbr_nr            675 arch/x86/events/perf_event.h 	int		lbr_nr;			   /* hardware stack size */
lbr_nr           2188 tools/perf/util/machine.c 		int lbr_nr = lbr_stack->nr, j, k;
lbr_nr           2201 tools/perf/util/machine.c 		int mix_chain_nr = i + 1 + lbr_nr + 1;
lbr_nr           2224 tools/perf/util/machine.c 				if (j < lbr_nr) {
lbr_nr           2225 tools/perf/util/machine.c 					k = lbr_nr - j - 1;
lbr_nr           2230 tools/perf/util/machine.c 				else if (j > lbr_nr)
lbr_nr           2231 tools/perf/util/machine.c 					ip = chain->ips[i + 1 - (j - lbr_nr)];