lbc 127 arch/mips/include/asm/txx9/tx3927.h volatile unsigned long lbc; lbc 154 arch/mips/pci/ops-tx3927.c tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD; lbc 156 arch/mips/pci/ops-tx3927.c tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE | lbc 175 arch/mips/pci/ops-tx3927.c tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; lbc 169 arch/powerpc/platforms/85xx/p1022_ds.c struct fsl_lbc_regs *lbc = NULL; lbc 198 arch/powerpc/platforms/85xx/p1022_ds.c lbc = of_iomap(lbc_node, 0); lbc 199 arch/powerpc/platforms/85xx/p1022_ds.c if (!lbc) { lbc 233 arch/powerpc/platforms/85xx/p1022_ds.c br0 = in_be32(&lbc->bank[0].br); lbc 234 arch/powerpc/platforms/85xx/p1022_ds.c br1 = in_be32(&lbc->bank[1].br); lbc 235 arch/powerpc/platforms/85xx/p1022_ds.c or0 = in_be32(&lbc->bank[0].or); lbc 236 arch/powerpc/platforms/85xx/p1022_ds.c or1 = in_be32(&lbc->bank[1].or); lbc 252 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[0].br, br0); lbc 253 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[0].or, or0); lbc 258 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[1].br, br1); lbc 259 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[1].or, or1); lbc 355 arch/powerpc/platforms/85xx/p1022_ds.c if (lbc) lbc 356 arch/powerpc/platforms/85xx/p1022_ds.c iounmap(lbc); lbc 67 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc; lbc 72 arch/powerpc/sysdev/fsl_lbc.c lbc = fsl_lbc_ctrl_dev->regs; lbc 73 arch/powerpc/sysdev/fsl_lbc.c for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) { lbc 74 arch/powerpc/sysdev/fsl_lbc.c u32 br = in_be32(&lbc->bank[i].br); lbc 75 arch/powerpc/sysdev/fsl_lbc.c u32 or = in_be32(&lbc->bank[i].or); lbc 98 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc; lbc 107 arch/powerpc/sysdev/fsl_lbc.c lbc = fsl_lbc_ctrl_dev->regs; lbc 108 arch/powerpc/sysdev/fsl_lbc.c br = in_be32(&lbc->bank[bank].br); lbc 112 arch/powerpc/sysdev/fsl_lbc.c upm->mxmr = &lbc->mamr; lbc 115 arch/powerpc/sysdev/fsl_lbc.c upm->mxmr = &lbc->mbmr; lbc 118 arch/powerpc/sysdev/fsl_lbc.c upm->mxmr = &lbc->mcmr; lbc 188 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 191 arch/powerpc/sysdev/fsl_lbc.c setbits32(&lbc->ltesr, LTESR_CLEAR); lbc 192 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteatr, 0); lbc 193 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltear, 0); lbc 194 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteccr, LTECCR_CLEAR); lbc 195 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltedr, LTEDR_ENABLE); lbc 199 arch/powerpc/sysdev/fsl_lbc.c clrsetbits_be32(&lbc->lbcr, LBCR_BMT, LBCR_BMTPS); lbc 212 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 217 arch/powerpc/sysdev/fsl_lbc.c status = in_be32(&lbc->ltesr); lbc 223 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltesr, LTESR_CLEAR); lbc 224 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteatr, 0); lbc 225 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltear, 0); lbc 355 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc; lbc 361 arch/powerpc/sysdev/fsl_lbc.c lbc = ctrl->regs; lbc 362 arch/powerpc/sysdev/fsl_lbc.c if (!lbc) lbc 369 arch/powerpc/sysdev/fsl_lbc.c _memcpy_fromio(ctrl->saved_regs, lbc, sizeof(struct fsl_lbc_regs)); lbc 379 arch/powerpc/sysdev/fsl_lbc.c struct fsl_lbc_regs __iomem *lbc; lbc 385 arch/powerpc/sysdev/fsl_lbc.c lbc = ctrl->regs; lbc 386 arch/powerpc/sysdev/fsl_lbc.c if (!lbc) lbc 390 arch/powerpc/sysdev/fsl_lbc.c _memcpy_toio(lbc, ctrl->saved_regs, lbc 861 drivers/crypto/cavium/nitrox/nitrox_csr.h u64 lbc : 1; lbc 877 drivers/crypto/cavium/nitrox/nitrox_csr.h u64 lbc : 1; lbc 242 drivers/crypto/cavium/nitrox/nitrox_isr.c if (core_int.s.lbc) lbc 157 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 168 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbar, page_addr >> 6); lbc 169 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fpar, lbc 178 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbar, page_addr >> 5); lbc 179 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fpar, lbc 209 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 212 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fmr, priv->fmr | 3); lbc 214 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr); lbc 218 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); lbc 222 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fbar), in_be32(&lbc->fpar), lbc 223 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fbcr), priv->bank); lbc 227 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->lsor, priv->bank); lbc 235 drivers/mtd/nand/raw/fsl_elbc_nand.c elbc_fcm_ctrl->mdr = in_be32(&lbc->mdr); lbc 242 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fir), in_be32(&lbc->fcr), lbc 253 drivers/mtd/nand/raw/fsl_elbc_nand.c uint32_t lteccr = in_be32(&lbc->lteccr); lbc 266 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */ lbc 280 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 283 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 290 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | lbc 293 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 300 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT); lbc 302 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); lbc 314 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 335 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */ lbc 360 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, mtd->oobsize - column); lbc 373 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) | lbc 376 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); lbc 381 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 256); lbc 401 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 408 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, lbc 413 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); lbc 445 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 454 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 472 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, fcr); lbc 489 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, lbc 492 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); lbc 501 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, lbc 504 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT); lbc 505 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 1); lbc 520 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT); lbc 521 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT); lbc 684 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 697 drivers/mtd/nand/raw/fsl_elbc_nand.c if (in_be32(&lbc->bank[priv->bank].or) & OR_FCM_PGS) lbc 728 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc = ctrl->regs; lbc 738 drivers/mtd/nand/raw/fsl_elbc_nand.c if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == lbc 812 drivers/mtd/nand/raw/fsl_elbc_nand.c clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); lbc 815 drivers/mtd/nand/raw/fsl_elbc_nand.c setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); lbc 849 drivers/mtd/nand/raw/fsl_elbc_nand.c struct fsl_lbc_regs __iomem *lbc; lbc 863 drivers/mtd/nand/raw/fsl_elbc_nand.c lbc = fsl_lbc_ctrl_dev->regs; lbc 875 drivers/mtd/nand/raw/fsl_elbc_nand.c if ((in_be32(&lbc->bank[bank].br) & BR_V) && lbc 876 drivers/mtd/nand/raw/fsl_elbc_nand.c (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM && lbc 877 drivers/mtd/nand/raw/fsl_elbc_nand.c (in_be32(&lbc->bank[bank].br) & lbc 878 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->bank[bank].or) & BR_BA) lbc 283 drivers/net/ethernet/ibm/ehea/ehea_phyp.h u64 lbc; /* 24 */ lbc 1336 drivers/staging/isdn/gigaset/capi.c int i, l, lbc, lhlc; lbc 1482 drivers/staging/isdn/gigaset/capi.c lbc = 2 * cmsg->BC[0]; lbc 1484 drivers/staging/isdn/gigaset/capi.c lbc = strlen(cip2bchlc[cmsg->CIPValue].bc); lbc 1486 drivers/staging/isdn/gigaset/capi.c lbc = 0; lbc 1494 drivers/staging/isdn/gigaset/capi.c if (lbc) { lbc 1496 drivers/staging/isdn/gigaset/capi.c l = lbc + 7; /* "^SBC=" + value + "\r" + null byte */ lbc 1509 drivers/staging/isdn/gigaset/capi.c strcpy(commands[AT_BC] + lbc + 5, ";^SHLC="); lbc 1513 drivers/staging/isdn/gigaset/capi.c commands[AT_BC] + lbc + 12); lbc 1515 drivers/staging/isdn/gigaset/capi.c strcpy(commands[AT_BC] + lbc + 12, lbc 57 drivers/uio/uio_fsl_elbc_gpcm.c struct fsl_lbc_regs __iomem *lbc; lbc 86 drivers/uio/uio_fsl_elbc_gpcm.c struct fsl_lbc_bank *bank = &priv->lbc->bank[priv->bank]; lbc 105 drivers/uio/uio_fsl_elbc_gpcm.c struct fsl_lbc_bank *bank = &priv->lbc->bank[priv->bank]; lbc 331 drivers/uio/uio_fsl_elbc_gpcm.c priv->lbc = fsl_lbc_ctrl_dev->regs; lbc 347 drivers/uio/uio_fsl_elbc_gpcm.c reg_br_cur = in_be32(&priv->lbc->bank[priv->bank].br); lbc 348 drivers/uio/uio_fsl_elbc_gpcm.c reg_or_cur = in_be32(&priv->lbc->bank[priv->bank].or); lbc 378 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&priv->lbc->bank[priv->bank].or, reg_or_new); lbc 379 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&priv->lbc->bank[priv->bank].br, reg_br_new);