lb_interrupt_mask 2956 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 lb_interrupt_mask; lb_interrupt_mask 2965 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 2966 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 2968 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 2971 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 2972 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 2974 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 2985 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 lb_interrupt_mask; lb_interrupt_mask 2994 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 2995 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 2997 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 3000 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 3001 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 3003 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 3082 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 lb_interrupt_mask; lb_interrupt_mask 3091 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 3092 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 3094 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 3097 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 3098 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 3100 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 3111 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 lb_interrupt_mask; lb_interrupt_mask 3120 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 3121 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 3123 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 3126 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); lb_interrupt_mask 3127 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, lb_interrupt_mask 3129 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); lb_interrupt_mask 2844 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 reg_block, lb_interrupt_mask; lb_interrupt_mask 2877 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); lb_interrupt_mask 2878 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; lb_interrupt_mask 2879 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); lb_interrupt_mask 2882 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); lb_interrupt_mask 2883 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask |= LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; lb_interrupt_mask 2884 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); lb_interrupt_mask 2895 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 reg_block, lb_interrupt_mask; lb_interrupt_mask 2928 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); lb_interrupt_mask 2929 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK; lb_interrupt_mask 2930 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); lb_interrupt_mask 2933 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); lb_interrupt_mask 2934 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_interrupt_mask |= LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK; lb_interrupt_mask 2935 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);