lanes 81 arch/arm/mach-omap2/display.c static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) lanes 111 arch/arm/mach-omap2/display.c reg |= (lanes << enable_shift) & enable_mask; lanes 112 arch/arm/mach-omap2/display.c reg |= (lanes << pipd_shift) & pipd_mask; lanes 437 drivers/edac/ppc4xx_edac.c unsigned int lane, lanes; lanes 450 drivers/edac/ppc4xx_edac.c for (lanes = 0, lane = first_lane; lane < lane_count; lane++) { lanes 454 drivers/edac/ppc4xx_edac.c (lanes++ ? ", " : ""), lane); lanes 465 drivers/edac/ppc4xx_edac.c n = snprintf(buffer, size, "%s; ", lanes ? "" : "None"); lanes 564 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes); lanes 1299 drivers/gpu/drm/amd/amdgpu/si.c static void si_set_pcie_lanes(struct amdgpu_device *adev, int lanes) lanes 1306 drivers/gpu/drm/amd/amdgpu/si.c switch (lanes) { lanes 1326 drivers/gpu/drm/amd/amdgpu/si.c DRM_ERROR("invalid pcie lane request: %d\n", lanes); lanes 703 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c ps->pcie.lanes = ((le32_to_cpu(pnon_clock_info->ulCapsAndSettings) & lanes 707 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c ps->pcie.lanes = 0; lanes 3154 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c power_state->pcie.lanes = 0; lanes 84 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h unsigned int lanes; lanes 91 drivers/gpu/drm/amd/powerplay/inc/power_state.h unsigned int lanes; lanes 43 drivers/gpu/drm/bridge/adv7511/adv7533.c clock_div_by_lanes[dsi->lanes - 2] << 3); lanes 74 drivers/gpu/drm/bridge/adv7511/adv7533.c regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); lanes 106 drivers/gpu/drm/bridge/adv7511/adv7533.c int lanes, ret; lanes 112 drivers/gpu/drm/bridge/adv7511/adv7533.c lanes = 4; lanes 114 drivers/gpu/drm/bridge/adv7511/adv7533.c lanes = 3; lanes 116 drivers/gpu/drm/bridge/adv7511/adv7533.c if (lanes != dsi->lanes) { lanes 118 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->lanes = lanes; lanes 165 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->lanes = adv->num_dsi_lanes; lanes 523 drivers/gpu/drm/bridge/cdns-dsi.c nlanes = output->dev->lanes; lanes 567 drivers/gpu/drm/bridge/cdns-dsi.c unsigned int lanes = output->dev->lanes; lanes 582 drivers/gpu/drm/bridge/cdns-dsi.c if (dsi_htotal % lanes) lanes 583 drivers/gpu/drm/bridge/cdns-dsi.c adj_dsi_htotal += lanes - (dsi_htotal % lanes); lanes 590 drivers/gpu/drm/bridge/cdns-dsi.c if (do_div(dlane_bps, lanes * dpi_htotal)) lanes 611 drivers/gpu/drm/bridge/cdns-dsi.c unsigned int nlanes = output->dev->lanes; lanes 738 drivers/gpu/drm/bridge/cdns-dsi.c DPHY_D_RSTB(output->dev->lanes) | DPHY_C_RSTB, lanes 753 drivers/gpu/drm/bridge/cdns-dsi.c for (i = 1; i < output->dev->lanes; i++) lanes 770 drivers/gpu/drm/bridge/cdns-dsi.c for (i = 0; i < output->dev->lanes; i++) lanes 795 drivers/gpu/drm/bridge/cdns-dsi.c nlanes = output->dev->lanes; lanes 746 drivers/gpu/drm/bridge/sii902x.c u8 lanes[4]; lanes 757 drivers/gpu/drm/bridge/sii902x.c lanes, 1, lanes 758 drivers/gpu/drm/bridge/sii902x.c ARRAY_SIZE(lanes)); lanes 765 drivers/gpu/drm/bridge/sii902x.c lanes[0] = 0; lanes 776 drivers/gpu/drm/bridge/sii902x.c i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE; lanes 235 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c u32 lanes; lanes 302 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (device->lanes > dsi->plat_data->max_data_lanes) { lanes 304 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c device->lanes); lanes 308 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->lanes = device->lanes; lanes 754 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c N_LANES(dsi->lanes)); lanes 834 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->master->lanes + dsi->lanes; lanes 838 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->lanes + dsi->slave->lanes; lanes 841 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->lanes; lanes 850 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c u32 lanes = dw_mipi_dsi_get_lanes(dsi); lanes 855 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lanes, dsi->format, &dsi->lane_mbps); lanes 1083 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->lanes = dsi->lanes; lanes 446 drivers/gpu/drm/bridge/tc358764.c dsi->lanes = 4; lanes 315 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi->lanes = 4; lanes 369 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); lanes 438 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); lanes 446 drivers/gpu/drm/bridge/ti-sn65dsi86.c dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) / lanes 502 drivers/gpu/drm/bridge/ti-sn65dsi86.c val = CHA_DSI_LANES(4 - pdata->dsi->lanes); lanes 507 drivers/gpu/drm/bridge/ti-sn65dsi86.c val = DP_NUM_LANES(pdata->dsi->lanes - 1); lanes 270 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 lanes; lanes 681 drivers/gpu/drm/exynos/exynos_drm_dsi.c | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) lanes 762 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg |= (DSIM_NUM_OF_DATA_LANE(dsi->lanes - 1) | DSIM_LANE_EN_CLK | lanes 853 drivers/gpu/drm/exynos/exynos_drm_dsi.c lanes_mask = BIT(dsi->lanes) - 1; lanes 1319 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_enable_lane(dsi, BIT(dsi->lanes) - 1); lanes 1559 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->lanes = device->lanes; lanes 89 drivers/gpu/drm/gma500/intel_bios.c switch (edp_link_params->lanes) { lanes 91 drivers/gpu/drm/gma500/intel_bios.c dev_priv->edp.lanes = 1; lanes 94 drivers/gpu/drm/gma500/intel_bios.c dev_priv->edp.lanes = 2; lanes 98 drivers/gpu/drm/gma500/intel_bios.c dev_priv->edp.lanes = 4; lanes 102 drivers/gpu/drm/gma500/intel_bios.c dev_priv->edp.lanes, dev_priv->edp.rate, dev_priv->edp.bpp); lanes 454 drivers/gpu/drm/gma500/intel_bios.h u8 lanes:4; lanes 600 drivers/gpu/drm/gma500/psb_drv.h int lanes; lanes 89 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 lanes; lanes 331 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 lanes) lanes 338 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c val = (lanes - 1) | (PHY_STOP_WAIT_TIME << 8); lanes 364 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 lanes) lanes 371 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_phy_timer(base, phy, lanes); lanes 395 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c for (i = 0; i < lanes; i++) { lanes 548 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dphy_req_kHz = mode->clock * bpp / dsi->lanes; lanes 555 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy(base, phy, dsi->lanes); lanes 567 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->lanes, mode->clock, phy->lane_byte_clk_kHz); lanes 618 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c req_kHz = mode->clock * bpp / dsi->lanes; lanes 630 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (mode->clock/dsi->lanes == lane_byte_clk_kHz/3) { lanes 732 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (mdsi->lanes < 1 || mdsi->lanes > 4) { lanes 737 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->lanes = mdsi->lanes; lanes 610 drivers/gpu/drm/i915/display/intel_bios.c switch (edp_link_params->lanes) { lanes 612 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.edp.lanes = 1; lanes 615 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.edp.lanes = 2; lanes 618 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.edp.lanes = 4; lanes 622 drivers/gpu/drm/i915/display/intel_bios.c edp_link_params->lanes); lanes 636 drivers/gpu/drm/i915/display/intel_vbt_defs.h u8 lanes:4; lanes 770 drivers/gpu/drm/i915/i915_drv.h int lanes; lanes 138 drivers/gpu/drm/mcde/mcde_dsi.c if (mdsi->lanes < 1 || mdsi->lanes > 2) { lanes 143 drivers/gpu/drm/mcde/mcde_dsi.c dev_info(d->dev, "attached DSI device with %d lanes\n", mdsi->lanes); lanes 492 drivers/gpu/drm/mcde/mcde_dsi.c bpl *= d->mdsi->lanes; lanes 509 drivers/gpu/drm/mcde/mcde_dsi.c line_duration = (blkline_pck + 6) / d->mdsi->lanes; lanes 521 drivers/gpu/drm/mcde/mcde_dsi.c blkeol_duration = (blkeol_pck + 6) / d->mdsi->lanes; lanes 606 drivers/gpu/drm/mcde/mcde_dsi.c if (d->mdsi->lanes == 2) lanes 632 drivers/gpu/drm/mcde/mcde_dsi.c if (d->mdsi->lanes == 2) lanes 641 drivers/gpu/drm/mcde/mcde_dsi.c if (d->mdsi->lanes == 2) lanes 173 drivers/gpu/drm/mediatek/mtk_dsi.c unsigned int lanes; lanes 343 drivers/gpu/drm/mediatek/mtk_dsi.c switch (dsi->lanes) { lanes 560 drivers/gpu/drm/mediatek/mtk_dsi.c overhead_bits = overhead_cycles * dsi->lanes * 8; lanes 564 drivers/gpu/drm/mediatek/mtk_dsi.c htotal * dsi->lanes); lanes 877 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->lanes = device->lanes; lanes 159 drivers/gpu/drm/msm/dsi/dsi_host.c unsigned int lanes; lanes 682 drivers/gpu/drm/msm/dsi/dsi_host.c u8 lanes = msm_host->lanes; lanes 687 drivers/gpu/drm/msm/dsi/dsi_host.c if (lanes == 0) { lanes 689 drivers/gpu/drm/msm/dsi/dsi_host.c lanes = 1; lanes 692 drivers/gpu/drm/msm/dsi/dsi_host.c do_div(pclk_bpp, (8 * lanes)); lanes 903 drivers/gpu/drm/msm/dsi/dsi_host.c DBG("lane number=%d", msm_host->lanes); lanes 904 drivers/gpu/drm/msm/dsi/dsi_host.c data |= ((DSI_CTRL_LANE0 << msm_host->lanes) - DSI_CTRL_LANE0); lanes 1587 drivers/gpu/drm/msm/dsi/dsi_host.c if (dsi->lanes > msm_host->num_data_lanes) lanes 1591 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->lanes = dsi->lanes; lanes 73 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h u8 lanes[4]; lanes 62 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 shift = sor->func->dp.lanes[ln] * 8; lanes 92 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c mask |= 1 << sor->func->dp.lanes[i]; lanes 268 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c .lanes = { 2, 1, 0, 3}, lanes 75 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c const u32 shift = sor->func->dp.lanes[ln] * 8; lanes 167 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c .lanes = { 2, 1, 0, 3 }, lanes 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c .lanes = { 2, 1, 0, 3 }, lanes 47 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c .lanes = { 0, 1, 2, 3 }, lanes 31 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c const u32 shift = sor->func->dp.lanes[ln] * 8; lanes 105 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c .lanes = { 0, 1, 2, 3 }, lanes 49 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c .lanes = { 2, 1, 0, 3 }, lanes 94 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c .lanes = { 0, 1, 2, 3 }, lanes 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c .lanes = { 2, 1, 0, 3}, lanes 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c .lanes = { 3, 2, 1, 0 }, lanes 78 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c .lanes = { 0, 1, 2, 3 }, lanes 406 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_lane_config lanes[DSI_MAX_NR_LANES]; lanes 1702 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[t].function == functions[i]) lanes 1709 drivers/gpu/drm/omapdrm/dss/dsi.c polarity = dsi->lanes[t].polarity; lanes 1832 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned int p = dsi->lanes[i].polarity; lanes 1884 drivers/gpu/drm/omapdrm/dss/dsi.c in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; lanes 1924 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function != DSI_LANE_UNUSED) lanes 1943 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_omap4_mux_pads(struct dsi_data *dsi, unsigned int lanes) lanes 1964 drivers/gpu/drm/omapdrm/dss/dsi.c (lanes << enable_shift) | (lanes << pipd_shift)); lanes 1975 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_omap5_mux_pads(struct dsi_data *dsi, unsigned int lanes) lanes 1988 drivers/gpu/drm/omapdrm/dss/dsi.c lanes << enable_shift); lanes 2062 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) lanes 3088 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) lanes 3667 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_lane_config lanes[DSI_MAX_NR_LANES]; lanes 3687 drivers/gpu/drm/omapdrm/dss/dsi.c lanes[i].function = DSI_LANE_UNUSED; lanes 3716 drivers/gpu/drm/omapdrm/dss/dsi.c lanes[lane].function = functions[i / 2]; lanes 3717 drivers/gpu/drm/omapdrm/dss/dsi.c lanes[lane].polarity = pol; lanes 3721 drivers/gpu/drm/omapdrm/dss/dsi.c memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); lanes 328 drivers/gpu/drm/omapdrm/dss/hdmi.h int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes); lanes 20 drivers/gpu/drm/omapdrm/dss/hdmi_common.c u32 lanes[8]; lanes 22 drivers/gpu/drm/omapdrm/dss/hdmi_common.c if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { lanes 27 drivers/gpu/drm/omapdrm/dss/hdmi_common.c r = of_property_read_u32_array(ep, "lanes", lanes, lanes 28 drivers/gpu/drm/omapdrm/dss/hdmi_common.c ARRAY_SIZE(lanes)); lanes 34 drivers/gpu/drm/omapdrm/dss/hdmi_common.c r = hdmi_phy_parse_lanes(phy, lanes); lanes 32 drivers/gpu/drm/omapdrm/dss/hdmi_phy.c int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes) lanes 40 drivers/gpu/drm/omapdrm/dss/hdmi_phy.c dx = lanes[i]; lanes 41 drivers/gpu/drm/omapdrm/dss/hdmi_phy.c dy = lanes[i + 1]; lanes 239 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c dsi->lanes = 4; lanes 467 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dsi->lanes = 4; lanes 43 drivers/gpu/drm/panel/panel-innolux-p079zca.c unsigned int lanes; lanes 251 drivers/gpu/drm/panel/panel-innolux-p079zca.c .lanes = 4, lanes 400 drivers/gpu/drm/panel/panel-innolux-p079zca.c .lanes = 4, lanes 517 drivers/gpu/drm/panel/panel-innolux-p079zca.c dsi->lanes = desc->lanes; lanes 460 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->lanes = 4; lanes 411 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c dsi->lanes = 4; lanes 453 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->lanes = 2; lanes 186 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dsi->lanes = 4; lanes 257 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dsi->lanes = 4; lanes 469 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dsi->lanes = 1; lanes 581 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = of_property_read_u32(np, "dsi-lanes", &dsi->lanes); lanes 402 drivers/gpu/drm/panel/panel-raydium-rm68200.c dsi->lanes = 2; lanes 318 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi->lanes = 4; lanes 364 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); lanes 224 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c dsi->lanes = 4; lanes 188 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->lanes = 2; lanes 696 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c dsi->lanes = 4; lanes 449 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c dsi->lanes = 1; lanes 991 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c dsi->lanes = 4; lanes 355 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dsi->lanes = 4; lanes 285 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->lanes = 2; lanes 3481 drivers/gpu/drm/panel/panel-simple.c unsigned int lanes; lanes 3509 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3539 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3567 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3595 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3624 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3652 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3683 drivers/gpu/drm/panel/panel-simple.c .lanes = 4, lanes 3732 drivers/gpu/drm/panel/panel-simple.c dsi->lanes = desc->lanes; lanes 93 drivers/gpu/drm/panel/panel-sitronix-st7701.c unsigned int lanes; lanes 325 drivers/gpu/drm/panel/panel-sitronix-st7701.c .lanes = 2, lanes 346 drivers/gpu/drm/panel/panel-sitronix-st7701.c dsi->lanes = desc->lanes; lanes 624 drivers/gpu/drm/panel/panel-truly-nt35597.c dsi_dev->lanes = 4; lanes 502 drivers/gpu/drm/radeon/r300.c void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes) lanes 514 drivers/gpu/drm/radeon/r300.c switch (lanes) { lanes 4401 drivers/gpu/drm/radeon/r600.c void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes) lanes 4417 drivers/gpu/drm/radeon/r600.c switch (lanes) { lanes 4441 drivers/gpu/drm/radeon/r600.c DRM_ERROR("invalid pcie lane request: %d\n", lanes); lanes 4493 drivers/gpu/drm/radeon/r600.c u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; lanes 4535 drivers/gpu/drm/radeon/r600.c lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT; lanes 4538 drivers/gpu/drm/radeon/r600.c link_width_cntl |= lanes | LC_RECONFIG_NOW | LC_RENEGOTIATE_EN; lanes 1362 drivers/gpu/drm/radeon/r600_dpm.c u8 r600_encode_pci_lane_width(u32 lanes) lanes 1366 drivers/gpu/drm/radeon/r600_dpm.c if (lanes > 16) lanes 1369 drivers/gpu/drm/radeon/r600_dpm.c return encoded_lanes[lanes]; lanes 236 drivers/gpu/drm/radeon/r600_dpm.h u8 r600_encode_pci_lane_width(u32 lanes); lanes 1958 drivers/gpu/drm/radeon/radeon.h void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); lanes 179 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); lanes 368 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); lanes 2027 drivers/gpu/drm/radeon/rv770.c u32 link_width_cntl, lanes, speed_cntl, tmp; lanes 2055 drivers/gpu/drm/radeon/rv770.c lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT; lanes 2058 drivers/gpu/drm/radeon/rv770.c link_width_cntl |= lanes | LC_RECONFIG_NOW | lanes 147 drivers/gpu/drm/rockchip/cdn-dp-core.c u8 lanes; lanes 154 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = 2; lanes 156 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = 4; lanes 158 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = 0; lanes 161 drivers/gpu/drm/rockchip/cdn-dp-core.c return lanes; lanes 181 drivers/gpu/drm/rockchip/cdn-dp-core.c int i, lanes; lanes 185 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = cdn_dp_get_port_lanes(port); lanes 186 drivers/gpu/drm/rockchip/cdn-dp-core.c if (lanes) lanes 283 drivers/gpu/drm/rockchip/cdn-dp-core.c u8 lanes, bpc; lanes 303 drivers/gpu/drm/rockchip/cdn-dp-core.c source_max = dp->lanes; lanes 305 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = min(source_max, sink_max); lanes 311 drivers/gpu/drm/rockchip/cdn-dp-core.c actual = rate * lanes / 100; lanes 417 drivers/gpu/drm/rockchip/cdn-dp-core.c port->lanes = cdn_dp_get_port_lanes(port); lanes 418 drivers/gpu/drm/rockchip/cdn-dp-core.c ret = cdn_dp_set_host_cap(dp, port->lanes, property.intval); lanes 454 drivers/gpu/drm/rockchip/cdn-dp-core.c port->lanes = 0; lanes 492 drivers/gpu/drm/rockchip/cdn-dp-core.c int ret, i, lanes; lanes 518 drivers/gpu/drm/rockchip/cdn-dp-core.c lanes = cdn_dp_get_port_lanes(port); lanes 519 drivers/gpu/drm/rockchip/cdn-dp-core.c if (lanes) { lanes 529 drivers/gpu/drm/rockchip/cdn-dp-core.c dp->lanes = port->lanes; lanes 583 drivers/gpu/drm/rockchip/cdn-dp-core.c return drm_dp_channel_eq_ok(link_status, min(port->lanes, sink_lanes)); lanes 956 drivers/gpu/drm/rockchip/cdn-dp-core.c unsigned int lanes = dp->link.num_lanes; lanes 969 drivers/gpu/drm/rockchip/cdn-dp-core.c (rate != dp->link.rate || lanes != dp->link.num_lanes)) { lanes 59 drivers/gpu/drm/rockchip/cdn-dp-core.h u8 lanes; lanes 98 drivers/gpu/drm/rockchip/cdn-dp-core.h u8 lanes; lanes 357 drivers/gpu/drm/rockchip/cdn-dp-reg.c int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip) lanes 363 drivers/gpu/drm/rockchip/cdn-dp-reg.c msg[1] = lanes | SCRAMBLER_EN; lanes 460 drivers/gpu/drm/rockchip/cdn-dp-reg.h int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip); lanes 472 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c unsigned long mode_flags, u32 lanes, u32 format, lanes 499 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c tmp = mpclk * (bpp / lanes) * 10 / 8; lanes 242 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c unsigned long mode_flags, u32 lanes, u32 format, lanes 262 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c pll_out_khz = mode->clock * bpp / lanes; lanes 339 drivers/gpu/drm/sun4i/sun4i_tcon.c u8 lanes = device->lanes; lanes 372 drivers/gpu/drm/sun4i/sun4i_tcon.c block_space = mode->htotal * bpp / (tcon_div * lanes); lanes 332 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c u8 lanes_mask = GENMASK(device->lanes - 1, 0); lanes 383 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return mode->htotal * Bpp / device->lanes; lanes 410 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c edge1 += (mode->hdisplay + hbp + 20) * Bpp / device->lanes; lanes 549 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (device->lanes == 4) lanes 745 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c device->lanes, cfg); lanes 39 drivers/gpu/drm/tegra/dsi.c unsigned int lanes; lanes 70 drivers/gpu/drm/tegra/dsi.c unsigned int lanes; lanes 478 drivers/gpu/drm/tegra/dsi.c return dsi->master->lanes + dsi->lanes; lanes 481 drivers/gpu/drm/tegra/dsi.c return dsi->lanes + dsi->slave->lanes; lanes 483 drivers/gpu/drm/tegra/dsi.c return dsi->lanes; lanes 516 drivers/gpu/drm/tegra/dsi.c DSI_CONTROL_LANES(dsi->lanes - 1) | lanes 600 drivers/gpu/drm/tegra/dsi.c unsigned int lanes = state->lanes; lanes 604 drivers/gpu/drm/tegra/dsi.c delay = DIV_ROUND_UP(delay * mul, div * lanes); lanes 608 drivers/gpu/drm/tegra/dsi.c bclk = DIV_ROUND_UP(mode->htotal * mul, div * lanes); lanes 609 drivers/gpu/drm/tegra/dsi.c bclk_ganged = DIV_ROUND_UP(bclk * lanes / 2, lanes); lanes 963 drivers/gpu/drm/tegra/dsi.c state->lanes = tegra_dsi_get_lanes(dsi); lanes 972 drivers/gpu/drm/tegra/dsi.c state->bclk = (state->pclk * state->mul) / (state->div * state->lanes); lanes 975 drivers/gpu/drm/tegra/dsi.c state->lanes); lanes 1013 drivers/gpu/drm/tegra/dsi.c scdiv = ((8 * state->mul) / (state->div * state->lanes)) - 2; lanes 1389 drivers/gpu/drm/tegra/dsi.c dsi->lanes = device->lanes; lanes 1498 drivers/gpu/drm/tegra/dsi.c dsi->lanes = 4; lanes 1688 drivers/gpu/drm/tegra/sor.c u8 rate, lanes; lanes 1909 drivers/gpu/drm/tegra/sor.c lanes = link.num_lanes; lanes 1918 drivers/gpu/drm/tegra/sor.c value |= SOR_DP_LINKCTL_LANE_COUNT(lanes); lanes 514 drivers/gpu/drm/vc4/vc4_dsi.c u32 lanes; lanes 680 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) | lanes 681 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) | lanes 682 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0)); lanes 685 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) | lanes 686 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) | lanes 687 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0)); lanes 690 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) | lanes 691 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) | lanes 692 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0)); lanes 874 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 2) lanes 895 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 4) lanes 897 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 3) lanes 899 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 2) lanes 1010 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 2 ? DSI_PHYC_DLANE1_ENABLE : 0) | lanes 1011 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 3 ? DSI_PHYC_DLANE2_ENABLE : 0) | lanes 1012 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 4 ? DSI_PHYC_DLANE3_ENABLE : 0) | lanes 1244 drivers/gpu/drm/vc4/vc4_dsi.c dsi->lanes = device->lanes; lanes 1251 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; lanes 1255 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; lanes 1259 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 18 / dsi->lanes; lanes 1263 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 16 / dsi->lanes; lanes 10248 drivers/infiniband/hw/hfi1/chip.c u32 lanes; lanes 10261 drivers/infiniband/hw/hfi1/chip.c lanes = (frame >> 16) & 0xffff; lanes 10271 drivers/infiniband/hw/hfi1/chip.c dd_dev_err(dd, " passing lane mask: 0x%x", lanes); lanes 410 drivers/media/i2c/smiapp-pll.c lane_op_clock_ratio = pll->csi2.lanes; lanes 422 drivers/media/i2c/smiapp-pll.c * (pll->csi2.lanes / lane_op_clock_ratio); lanes 34 drivers/media/i2c/smiapp-pll.h uint8_t lanes; lanes 1285 drivers/media/i2c/smiapp/smiapp-core.c sensor->hwcfg->lanes - 1); lanes 2783 drivers/media/i2c/smiapp/smiapp-core.c hwcfg->lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; lanes 2789 drivers/media/i2c/smiapp/smiapp-core.c hwcfg->lanes = 1; lanes 2796 drivers/media/i2c/smiapp/smiapp-core.c dev_dbg(dev, "lanes %u\n", hwcfg->lanes); lanes 3053 drivers/media/i2c/smiapp/smiapp-core.c sensor->pll.csi2.lanes = sensor->hwcfg->lanes; lanes 683 drivers/media/i2c/tc358743.c unsigned lanes = tc358743_num_csi_lanes_needed(sd); lanes 687 drivers/media/i2c/tc358743.c state->csi_lanes_in_use = lanes; lanes 691 drivers/media/i2c/tc358743.c if (lanes < 1) lanes 693 drivers/media/i2c/tc358743.c if (lanes < 1) lanes 695 drivers/media/i2c/tc358743.c if (lanes < 2) lanes 697 drivers/media/i2c/tc358743.c if (lanes < 3) lanes 699 drivers/media/i2c/tc358743.c if (lanes < 4) lanes 713 drivers/media/i2c/tc358743.c ((lanes > 0) ? MASK_CLM_HSTXVREGEN : 0x0) | lanes 714 drivers/media/i2c/tc358743.c ((lanes > 0) ? MASK_D0M_HSTXVREGEN : 0x0) | lanes 715 drivers/media/i2c/tc358743.c ((lanes > 1) ? MASK_D1M_HSTXVREGEN : 0x0) | lanes 716 drivers/media/i2c/tc358743.c ((lanes > 2) ? MASK_D2M_HSTXVREGEN : 0x0) | lanes 717 drivers/media/i2c/tc358743.c ((lanes > 3) ? MASK_D3M_HSTXVREGEN : 0x0)); lanes 728 drivers/media/i2c/tc358743.c ((lanes == 4) ? MASK_NOL_4 : lanes 729 drivers/media/i2c/tc358743.c (lanes == 3) ? MASK_NOL_3 : lanes 730 drivers/media/i2c/tc358743.c (lanes == 2) ? MASK_NOL_2 : MASK_NOL_1)); lanes 360 drivers/media/pci/intel/ipu3/ipu3-cio2.c u8 lanes, csi2bus = q->csi2.port; lanes 369 drivers/media/pci/intel/ipu3/ipu3-cio2.c lanes = q->csi2.lanes; lanes 380 drivers/media/pci/intel/ipu3/ipu3-cio2.c for (i = 0; i < lanes; i++) { lanes 445 drivers/media/pci/intel/ipu3/ipu3-cio2.c writel(lanes, q->csi_rx_base + CIO2_REG_CSIRX_NOF_ENABLED_LANES); lanes 1508 drivers/media/pci/intel/ipu3/ipu3-cio2.c s_asd->csi2.lanes = vep.bus.mipi_csi2.num_data_lanes; lanes 322 drivers/media/pci/intel/ipu3/ipu3-cio2.h u32 lanes; lanes 73 drivers/media/platform/cadence/cdns-csi2rx.c u8 lanes[CSI2RX_LANES_MAX]; lanes 120 drivers/media/platform/cadence/cdns-csi2rx.c reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, csi2rx->lanes[i]); lanes 121 drivers/media/platform/cadence/cdns-csi2rx.c set_bit(csi2rx->lanes[i], &lanes_used); lanes 388 drivers/media/platform/cadence/cdns-csi2rx.c memcpy(csi2rx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes, lanes 389 drivers/media/platform/cadence/cdns-csi2rx.c sizeof(csi2rx->lanes)); lanes 114 drivers/media/platform/cadence/cdns-csi2tx.c u8 lanes[CSI2TX_LANES_MAX]; lanes 252 drivers/media/platform/cadence/cdns-csi2tx.c reg |= CSI2TX_DPHY_CFG_LANE_ENABLE(csi2tx->lanes[i] - 1); lanes 274 drivers/media/platform/cadence/cdns-csi2tx.c reg |= CSI2TX_DPHY_CFG_LANE_RESET(csi2tx->lanes[i] - 1); lanes 532 drivers/media/platform/cadence/cdns-csi2tx.c memcpy(csi2tx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes, lanes 533 drivers/media/platform/cadence/cdns-csi2tx.c sizeof(csi2tx->lanes)); lanes 166 drivers/media/platform/omap3isp/ispcsiphy.c struct isp_csiphy_lanes_cfg *lanes; lanes 174 drivers/media/platform/omap3isp/ispcsiphy.c lanes = &buscfg->bus.ccp2.lanecfg; lanes 177 drivers/media/platform/omap3isp/ispcsiphy.c lanes = &buscfg->bus.csi2.lanecfg; lanes 186 drivers/media/platform/omap3isp/ispcsiphy.c if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) lanes 189 drivers/media/platform/omap3isp/ispcsiphy.c if (used_lanes & (1 << lanes->data[i].pos)) lanes 192 drivers/media/platform/omap3isp/ispcsiphy.c used_lanes |= 1 << lanes->data[i].pos; lanes 195 drivers/media/platform/omap3isp/ispcsiphy.c if (lanes->clk.pol > 1 || lanes->clk.pos > 3) lanes 198 drivers/media/platform/omap3isp/ispcsiphy.c if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) lanes 244 drivers/media/platform/omap3isp/ispcsiphy.c reg |= (lanes->data[i].pol << lanes 246 drivers/media/platform/omap3isp/ispcsiphy.c reg |= (lanes->data[i].pos << lanes 252 drivers/media/platform/omap3isp/ispcsiphy.c reg |= lanes->clk.pol << ISPCSI2_PHY_CFG_CLOCK_POL_SHIFT; lanes 253 drivers/media/platform/omap3isp/ispcsiphy.c reg |= lanes->clk.pos << ISPCSI2_PHY_CFG_CLOCK_POSITION_SHIFT; lanes 372 drivers/media/platform/rcar-vin/rcar-csi2.c unsigned short lanes; lanes 417 drivers/media/platform/rcar-vin/rcar-csi2.c const u32 lane_mask = (1 << priv->lanes) - 1; lanes 474 drivers/media/platform/rcar-vin/rcar-csi2.c do_div(mbps, priv->lanes * 1000000); lanes 525 drivers/media/platform/rcar-vin/rcar-csi2.c phycnt |= (1 << priv->lanes) - 1; lanes 790 drivers/media/platform/rcar-vin/rcar-csi2.c priv->lanes = vep->bus.mipi_csi2.num_data_lanes; lanes 791 drivers/media/platform/rcar-vin/rcar-csi2.c if (priv->lanes != 1 && priv->lanes != 2 && priv->lanes != 4) { lanes 793 drivers/media/platform/rcar-vin/rcar-csi2.c priv->lanes); lanes 798 drivers/media/platform/rcar-vin/rcar-csi2.c priv->lane_swap[i] = i < priv->lanes ? lanes 1192 drivers/media/platform/rcar-vin/rcar-csi2.c dev_info(priv->dev, "%d lanes found\n", priv->lanes); lanes 40 drivers/net/ethernet/netronome/nfp/nfp_devlink.c nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) lanes 49 drivers/net/ethernet/netronome/nfp/nfp_devlink.c ret = __nfp_eth_set_split(nsp, lanes); lanes 70 drivers/net/ethernet/netronome/nfp/nfp_devlink.c unsigned int lanes; lanes 90 drivers/net/ethernet/netronome/nfp/nfp_devlink.c lanes = eth_port.port_lanes / count; lanes 91 drivers/net/ethernet/netronome/nfp/nfp_devlink.c if (eth_port.lanes == 10 && count == 2) lanes 92 drivers/net/ethernet/netronome/nfp/nfp_devlink.c lanes = 8 / count; lanes 94 drivers/net/ethernet/netronome/nfp/nfp_devlink.c ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); lanes 107 drivers/net/ethernet/netronome/nfp/nfp_devlink.c unsigned int lanes; lanes 124 drivers/net/ethernet/netronome/nfp/nfp_devlink.c lanes = eth_port.port_lanes; lanes 126 drivers/net/ethernet/netronome/nfp/nfp_devlink.c lanes = 10; lanes 128 drivers/net/ethernet/netronome/nfp/nfp_devlink.c ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); lanes 340 drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c u32 speed = cmd->base.speed / eth_port->lanes; lanes 158 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.h unsigned int lanes; lanes 216 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.h int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes); lanes 139 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c dst->lanes = FIELD_GET(NSP_ETH_PORT_LANES, port); lanes 146 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c dst->speed = dst->lanes * rate; lanes 187 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c table->ports[i].port_lanes += table->ports[j].lanes; lanes 605 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes) lanes 608 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c lanes, NSP_ETH_CTRL_SET_LANES); lanes 308 drivers/net/ethernet/ti/netcp_xgbepcsr.c void __iomem *sw_regs, u32 lanes, lanes 316 drivers/net/ethernet/ti/netcp_xgbepcsr.c for (i = 0; i < lanes; i++) { lanes 224 drivers/nubus/nubus.c dir->mask = board->lanes; lanes 234 drivers/nubus/nubus.c dir->mask = fres->board->lanes; lanes 246 drivers/nubus/nubus.c dir->mask = board->lanes; lanes 760 drivers/nubus/nubus.c board->lanes = bytelanes; lanes 779 drivers/nubus/nubus.c board->lanes); lanes 73 drivers/nubus/proc.c int lanes = board->lanes; lanes 78 drivers/nubus/proc.c return proc_mkdir_data(name, 0555, procdir, (void *)lanes); lanes 120 drivers/nubus/proc.c int lanes = (int)proc_get_parent_data(inode); lanes 123 drivers/nubus/proc.c if (!lanes) lanes 126 drivers/nubus/proc.c ent.mask = lanes; lanes 492 drivers/pci/controller/dwc/pcie-designware.c u32 lanes; lanes 506 drivers/pci/controller/dwc/pcie-designware.c ret = of_property_read_u32(np, "num-lanes", &lanes); lanes 515 drivers/pci/controller/dwc/pcie-designware.c switch (lanes) { lanes 529 drivers/pci/controller/dwc/pcie-designware.c dev_err(pci->dev, "num-lanes %u: invalid value\n", lanes); lanes 537 drivers/pci/controller/dwc/pcie-designware.c switch (lanes) { lanes 400 drivers/pci/controller/pci-tegra.c unsigned int lanes; lanes 1070 drivers/pci/controller/pci-tegra.c for (i = 0; i < port->lanes; i++) { lanes 1087 drivers/pci/controller/pci-tegra.c for (i = 0; i < port->lanes; i++) { lanes 1422 drivers/pci/controller/pci-tegra.c port->phys = devm_kcalloc(dev, sizeof(phy), port->lanes, GFP_KERNEL); lanes 1426 drivers/pci/controller/pci-tegra.c for (i = 0; i < port->lanes; i++) { lanes 1480 drivers/pci/controller/pci-tegra.c for (i = 0; i < port->lanes; i++) { lanes 1892 drivers/pci/controller/pci-tegra.c static int tegra_pcie_get_xbar_config(struct tegra_pcie *pcie, u32 lanes, lanes 1899 drivers/pci/controller/pci-tegra.c switch (lanes) { lanes 1924 drivers/pci/controller/pci-tegra.c switch (lanes) { lanes 1936 drivers/pci/controller/pci-tegra.c switch (lanes) { lanes 1953 drivers/pci/controller/pci-tegra.c switch (lanes) { lanes 2162 drivers/pci/controller/pci-tegra.c u32 lanes = 0, mask = 0; lanes 2266 drivers/pci/controller/pci-tegra.c lanes |= value << (index << 3); lanes 2290 drivers/pci/controller/pci-tegra.c rp->lanes = value; lanes 2326 drivers/pci/controller/pci-tegra.c err = tegra_pcie_get_xbar_config(pcie, lanes, &pcie->xbar_config); lanes 2461 drivers/pci/controller/pci-tegra.c port->index, port->lanes); lanes 313 drivers/pci/controller/pci-xgene.c u32 *lanes, u32 *speed) lanes 323 drivers/pci/controller/pci-xgene.c *lanes = val32 >> 26; lanes 574 drivers/pci/controller/pci-xgene.c u32 val, lanes = 0, speed = 0; lanes 591 drivers/pci/controller/pci-xgene.c xgene_pcie_linkup(port, &lanes, &speed); lanes 595 drivers/pci/controller/pci-xgene.c dev_info(dev, "(rc) x%d gen-%d link up\n", lanes, speed + 1); lanes 58 drivers/pci/controller/pcie-rockchip.c rockchip->lanes = 1; lanes 59 drivers/pci/controller/pcie-rockchip.c err = of_property_read_u32(node, "num-lanes", &rockchip->lanes); lanes 60 drivers/pci/controller/pcie-rockchip.c if (!err && (rockchip->lanes == 0 || lanes 61 drivers/pci/controller/pcie-rockchip.c rockchip->lanes == 3 || lanes 62 drivers/pci/controller/pcie-rockchip.c rockchip->lanes > 4)) { lanes 64 drivers/pci/controller/pcie-rockchip.c rockchip->lanes = 1; lanes 241 drivers/pci/controller/pcie-rockchip.c PCIE_CLIENT_CONF_LANE_NUM(rockchip->lanes); lanes 299 drivers/pci/controller/pcie-rockchip.h u32 lanes; lanes 125 drivers/phy/allwinner/phy-sun6i-mipi-dphy.c u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0); lanes 151 drivers/phy/allwinner/phy-sun6i-mipi-dphy.c SUN6I_DPHY_GCTL_LANE_NUM(dphy->config.lanes) | lanes 24 drivers/phy/phy-core-mipi-dphy.c unsigned int lanes, lanes 34 drivers/phy/phy-core-mipi-dphy.c do_div(hs_clk_rate, lanes); lanes 76 drivers/phy/phy-core-mipi-dphy.c cfg->lanes = lanes; lanes 438 drivers/phy/tegra/xusb-tegra124.c usb2->base.soc = &pad->soc->lanes[index]; lanes 662 drivers/phy/tegra/xusb-tegra124.c .lanes = tegra124_usb2_lanes, lanes 687 drivers/phy/tegra/xusb-tegra124.c ulpi->base.soc = &pad->soc->lanes[index]; lanes 797 drivers/phy/tegra/xusb-tegra124.c .lanes = tegra124_ulpi_lanes, lanes 823 drivers/phy/tegra/xusb-tegra124.c hsic->base.soc = &pad->soc->lanes[index]; lanes 1013 drivers/phy/tegra/xusb-tegra124.c .lanes = tegra124_hsic_lanes, lanes 1043 drivers/phy/tegra/xusb-tegra124.c pcie->base.soc = &pad->soc->lanes[index]; lanes 1201 drivers/phy/tegra/xusb-tegra124.c .lanes = tegra124_pcie_lanes, lanes 1221 drivers/phy/tegra/xusb-tegra124.c sata->base.soc = &pad->soc->lanes[index]; lanes 1397 drivers/phy/tegra/xusb-tegra124.c .lanes = tegra124_sata_lanes, lanes 158 drivers/phy/tegra/xusb-tegra186.c usb2->base.soc = &pad->soc->lanes[index]; lanes 515 drivers/phy/tegra/xusb-tegra186.c .lanes = tegra186_usb2_lanes, lanes 553 drivers/phy/tegra/xusb-tegra186.c usb3->base.soc = &pad->soc->lanes[index]; lanes 777 drivers/phy/tegra/xusb-tegra186.c .lanes = tegra186_usb3_lanes, lanes 874 drivers/phy/tegra/xusb-tegra210.c usb2->base.soc = &pad->soc->lanes[index]; lanes 1148 drivers/phy/tegra/xusb-tegra210.c .lanes = tegra210_usb2_lanes, lanes 1173 drivers/phy/tegra/xusb-tegra210.c hsic->base.soc = &pad->soc->lanes[index]; lanes 1402 drivers/phy/tegra/xusb-tegra210.c .lanes = tegra210_hsic_lanes, lanes 1435 drivers/phy/tegra/xusb-tegra210.c pcie->base.soc = &pad->soc->lanes[index]; lanes 1586 drivers/phy/tegra/xusb-tegra210.c .lanes = tegra210_pcie_lanes, lanes 1606 drivers/phy/tegra/xusb-tegra210.c sata->base.soc = &pad->soc->lanes[index]; lanes 1750 drivers/phy/tegra/xusb-tegra210.c .lanes = tegra210_sata_lanes, lanes 35 drivers/phy/tegra/xusb.c if (!pad->lanes[i]) lanes 38 drivers/phy/tegra/xusb.c if (pad->lanes[i]->dev.of_node == args->np) { lanes 39 drivers/phy/tegra/xusb.c phy = pad->lanes[i]; lanes 91 drivers/phy/tegra/xusb.c struct device_node *np, *lanes; lanes 93 drivers/phy/tegra/xusb.c lanes = of_get_child_by_name(pad->dev.of_node, "lanes"); lanes 94 drivers/phy/tegra/xusb.c if (!lanes) lanes 97 drivers/phy/tegra/xusb.c np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); lanes 98 drivers/phy/tegra/xusb.c of_node_put(lanes); lanes 187 drivers/phy/tegra/xusb.c pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), lanes 189 drivers/phy/tegra/xusb.c if (!pad->lanes) { lanes 204 drivers/phy/tegra/xusb.c pad->lanes[i] = phy_create(&pad->dev, np, ops); lanes 205 drivers/phy/tegra/xusb.c if (IS_ERR(pad->lanes[i])) { lanes 206 drivers/phy/tegra/xusb.c err = PTR_ERR(pad->lanes[i]); lanes 213 drivers/phy/tegra/xusb.c phy_destroy(pad->lanes[i]); lanes 218 drivers/phy/tegra/xusb.c list_add_tail(&lane->list, &pad->padctl->lanes); lanes 219 drivers/phy/tegra/xusb.c phy_set_drvdata(pad->lanes[i], lane); lanes 233 drivers/phy/tegra/xusb.c tegra_xusb_lane_destroy(pad->lanes[i]); lanes 247 drivers/phy/tegra/xusb.c tegra_xusb_lane_destroy(pad->lanes[i]); lanes 332 drivers/phy/tegra/xusb.c if (pad->lanes[i]) { lanes 333 drivers/phy/tegra/xusb.c lane = phy_get_drvdata(pad->lanes[i]); lanes 392 drivers/phy/tegra/xusb.c list_for_each_entry(lane, &padctl->lanes, list) { lanes 886 drivers/phy/tegra/xusb.c INIT_LIST_HEAD(&padctl->lanes); lanes 146 drivers/phy/tegra/xusb.h const struct tegra_xusb_lane_soc *lanes; lanes 156 drivers/phy/tegra/xusb.h struct phy **lanes; lanes 409 drivers/phy/tegra/xusb.h struct list_head lanes; lanes 61 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c const struct tegra_xusb_padctl_lane *lanes; lanes 303 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; lanes 337 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; lanes 376 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; lanes 859 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c .lanes = tegra124_lanes, lanes 608 drivers/scsi/ufs/ufs-qcom.c int lanes = max_t(u32, p->lane_rx, p->lane_tx); lanes 615 drivers/scsi/ufs/ufs-qcom.c if (!lanes) lanes 616 drivers/scsi/ufs/ufs-qcom.c lanes = 1; lanes 625 drivers/scsi/ufs/ufs-qcom.c p->hs_rate == PA_HS_MODE_B ? "B" : "A", gear, lanes); lanes 629 drivers/scsi/ufs/ufs-qcom.c "PWM", gear, lanes); lanes 136 drivers/staging/media/imx/imx6-mipi-csi2.c int lanes = csi2->bus.num_data_lanes; lanes 138 drivers/staging/media/imx/imx6-mipi-csi2.c writel(lanes - 1, csi2->base + CSI2_N_LANES); lanes 416 drivers/staging/media/imx/imx7-mipi-csis.c int lanes = state->bus.num_data_lanes; lanes 421 drivers/staging/media/imx/imx7-mipi-csis.c val |= (lanes - 1) << MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET; lanes 36 drivers/staging/media/omap4iss/iss_csiphy.c reg |= (phy->lanes.data[i].pol ? lanes 38 drivers/staging/media/omap4iss/iss_csiphy.c reg |= (phy->lanes.data[i].pos << lanes 44 drivers/staging/media/omap4iss/iss_csiphy.c reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; lanes 45 drivers/staging/media/omap4iss/iss_csiphy.c reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; lanes 123 drivers/staging/media/omap4iss/iss_csiphy.c struct iss_csiphy_lanes_cfg *lanes; lanes 128 drivers/staging/media/omap4iss/iss_csiphy.c lanes = &subdevs->bus.csi2.lanecfg; lanes 175 drivers/staging/media/omap4iss/iss_csiphy.c if (lanes->data[i].pos == 0) lanes 178 drivers/staging/media/omap4iss/iss_csiphy.c if (lanes->data[i].pol > 1 || lanes 179 drivers/staging/media/omap4iss/iss_csiphy.c lanes->data[i].pos > (csi2->phy->max_data_lanes + 1)) lanes 182 drivers/staging/media/omap4iss/iss_csiphy.c if (used_lanes & (1 << lanes->data[i].pos)) lanes 185 drivers/staging/media/omap4iss/iss_csiphy.c used_lanes |= 1 << lanes->data[i].pos; lanes 189 drivers/staging/media/omap4iss/iss_csiphy.c if (lanes->clk.pol > 1 || lanes 190 drivers/staging/media/omap4iss/iss_csiphy.c lanes->clk.pos > (csi2->phy->max_data_lanes + 1)) lanes 193 drivers/staging/media/omap4iss/iss_csiphy.c if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) lanes 212 drivers/staging/media/omap4iss/iss_csiphy.c csi2->phy->lanes = *lanes; lanes 37 drivers/staging/media/omap4iss/iss_csiphy.h struct iss_csiphy_lanes_cfg lanes; lanes 369 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_lane_config lanes[DSI_MAX_NR_LANES]; lanes 1820 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[t].function == functions[i]) lanes 1827 drivers/video/fbdev/omap2/omapfb/dss/dsi.c polarity = dsi->lanes[t].polarity; lanes 1952 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned p = dsi->lanes[i].polarity; lanes 2005 drivers/video/fbdev/omap2/omapfb/dss/dsi.c in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; lanes 2046 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function != DSI_LANE_UNUSED) lanes 2108 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) lanes 3158 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) lanes 3744 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_lane_config lanes[DSI_MAX_NR_LANES]; lanes 3764 drivers/video/fbdev/omap2/omapfb/dss/dsi.c lanes[i].function = DSI_LANE_UNUSED; lanes 3793 drivers/video/fbdev/omap2/omapfb/dss/dsi.c lanes[lane].function = functions[i / 2]; lanes 3794 drivers/video/fbdev/omap2/omapfb/dss/dsi.c lanes[lane].polarity = pol; lanes 3798 drivers/video/fbdev/omap2/omapfb/dss/dsi.c memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); lanes 310 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes); lanes 20 drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c u32 lanes[8]; lanes 22 drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { lanes 27 drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c r = of_property_read_u32_array(ep, "lanes", lanes, lanes 28 drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c ARRAY_SIZE(lanes)); lanes 34 drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c r = hdmi_phy_parse_lanes(phy, lanes); lanes 41 drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes) lanes 49 drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c dx = lanes[i]; lanes 50 drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c dy = lanes[i + 1]; lanes 28 include/drm/bridge/dw_mipi_dsi.h unsigned long mode_flags, u32 lanes, u32 format, lanes 181 include/drm/drm_mipi_dsi.h unsigned int lanes; lanes 59 include/linux/nubus.h unsigned char lanes; lanes 275 include/linux/phy/phy-mipi-dphy.h unsigned char lanes; lanes 280 include/linux/phy/phy-mipi-dphy.h unsigned int lanes, lanes 55 include/media/i2c/smiapp.h unsigned int lanes; /* Number of CSI-2 lanes */