lane_cnt          135 drivers/gpu/drm/i915/display/intel_bios.h 	u16 lane_cnt:2;
lane_cnt          585 drivers/gpu/drm/i915/display/intel_dsi_vbt.c 	intel_dsi->lane_count = mipi_config->lane_cnt + 1;
lane_cnt          100 drivers/gpu/drm/msm/edp/edp_ctrl.c 	u8 lane_cnt;
lane_cnt          431 drivers/gpu/drm/msm/edp/edp_ctrl.c 	ctrl->lane_cnt = lane;
lane_cnt          432 drivers/gpu/drm/msm/edp/edp_ctrl.c 	DBG("rate=%d lane=%d", ctrl->link_rate, ctrl->lane_cnt);
lane_cnt          440 drivers/gpu/drm/msm/edp/edp_ctrl.c 	data = EDP_CONFIGURATION_CTRL_LANES(ctrl->lane_cnt - 1);
lane_cnt          515 drivers/gpu/drm/msm/edp/edp_ctrl.c 	for (i = 0; i < ctrl->lane_cnt; i++) {
lane_cnt          526 drivers/gpu/drm/msm/edp/edp_ctrl.c 	for (i = 0; i < ctrl->lane_cnt; i++) {
lane_cnt          619 drivers/gpu/drm/msm/edp/edp_ctrl.c 		if (drm_dp_clock_recovery_ok(link_status, ctrl->lane_cnt)) {
lane_cnt          676 drivers/gpu/drm/msm/edp/edp_ctrl.c 		if (drm_dp_channel_eq_ok(link_status, ctrl->lane_cnt)) {
lane_cnt          703 drivers/gpu/drm/msm/edp/edp_ctrl.c 	lane = ctrl->lane_cnt;
lane_cnt          732 drivers/gpu/drm/msm/edp/edp_ctrl.c 			ctrl->lane_cnt = lane;
lane_cnt          762 drivers/gpu/drm/msm/edp/edp_ctrl.c 	dp_link.num_lanes = ctrl->lane_cnt;
lane_cnt          902 drivers/gpu/drm/msm/edp/edp_ctrl.c 		msm_edp_phy_lane_power_ctrl(ctrl->phy, true, ctrl->lane_cnt);
lane_cnt          483 drivers/media/platform/qcom/camss/camss-csid.c 			u8 num_lanes = csid->phy.lane_cnt;
lane_cnt          687 drivers/media/platform/qcom/camss/camss-csid.c 			val = phy->lane_cnt - 1;
lane_cnt         1264 drivers/media/platform/qcom/camss/camss-csid.c 		csid->phy.lane_cnt = lane_cfg->num_data;
lane_cnt           40 drivers/media/platform/qcom/camss/camss-csid.h 	u8 lane_cnt;