l3c_pmu 49 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static u64 hisi_l3c_pmu_read_counter(struct hisi_pmu *l3c_pmu, l3c_pmu 54 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) { l3c_pmu 55 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx); l3c_pmu 60 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx)); l3c_pmu 63 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_write_counter(struct hisi_pmu *l3c_pmu, l3c_pmu 68 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) { l3c_pmu 69 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx); l3c_pmu 74 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx)); l3c_pmu 77 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_write_evtype(struct hisi_pmu *l3c_pmu, int idx, l3c_pmu 94 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + reg); l3c_pmu 97 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + reg); l3c_pmu 100 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_start_counters(struct hisi_pmu *l3c_pmu) l3c_pmu 108 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_PERF_CTRL); l3c_pmu 110 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_PERF_CTRL); l3c_pmu 113 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_stop_counters(struct hisi_pmu *l3c_pmu) l3c_pmu 121 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_PERF_CTRL); l3c_pmu 123 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_PERF_CTRL); l3c_pmu 126 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_enable_counter(struct hisi_pmu *l3c_pmu, l3c_pmu 132 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_EVENT_CTRL); l3c_pmu 134 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_EVENT_CTRL); l3c_pmu 137 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_disable_counter(struct hisi_pmu *l3c_pmu, l3c_pmu 143 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_EVENT_CTRL); l3c_pmu 145 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_EVENT_CTRL); l3c_pmu 148 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_enable_counter_int(struct hisi_pmu *l3c_pmu, l3c_pmu 153 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_INT_MASK); l3c_pmu 156 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_INT_MASK); l3c_pmu 159 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static void hisi_l3c_pmu_disable_counter_int(struct hisi_pmu *l3c_pmu, l3c_pmu 164 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val = readl(l3c_pmu->base + L3C_INT_MASK); l3c_pmu 167 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel(val, l3c_pmu->base + L3C_INT_MASK); l3c_pmu 172 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c struct hisi_pmu *l3c_pmu = dev_id; l3c_pmu 178 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c overflown = readl(l3c_pmu->base + L3C_INT_STATUS); l3c_pmu 188 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c writel((1 << idx), l3c_pmu->base + L3C_INT_CLEAR); l3c_pmu 191 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c event = l3c_pmu->pmu_events.hw_events[idx]; l3c_pmu 202 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c static int hisi_l3c_pmu_init_irq(struct hisi_pmu *l3c_pmu, l3c_pmu 214 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c dev_name(&pdev->dev), l3c_pmu); l3c_pmu 221 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->irq = irq; l3c_pmu 233 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c struct hisi_pmu *l3c_pmu) l3c_pmu 244 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->index_id = id; l3c_pmu 251 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c &l3c_pmu->sccl_id)) { l3c_pmu 257 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c &l3c_pmu->ccl_id)) { l3c_pmu 263 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->base = devm_ioremap_resource(&pdev->dev, res); l3c_pmu 264 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c if (IS_ERR(l3c_pmu->base)) { l3c_pmu 266 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c return PTR_ERR(l3c_pmu->base); l3c_pmu 336 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c struct hisi_pmu *l3c_pmu) l3c_pmu 340 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c ret = hisi_l3c_pmu_init_data(pdev, l3c_pmu); l3c_pmu 344 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c ret = hisi_l3c_pmu_init_irq(l3c_pmu, pdev); l3c_pmu 348 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->num_counters = L3C_NR_COUNTERS; l3c_pmu 349 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->counter_bits = 48; l3c_pmu 350 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->ops = &hisi_uncore_l3c_ops; l3c_pmu 351 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->dev = &pdev->dev; l3c_pmu 352 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->on_cpu = -1; l3c_pmu 353 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->check_event = 0x59; l3c_pmu 360 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c struct hisi_pmu *l3c_pmu; l3c_pmu 364 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu = devm_kzalloc(&pdev->dev, sizeof(*l3c_pmu), GFP_KERNEL); l3c_pmu 365 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c if (!l3c_pmu) l3c_pmu 368 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c platform_set_drvdata(pdev, l3c_pmu); l3c_pmu 370 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c ret = hisi_l3c_pmu_dev_probe(pdev, l3c_pmu); l3c_pmu 375 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c &l3c_pmu->node); l3c_pmu 382 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->sccl_id, l3c_pmu->index_id); l3c_pmu 383 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c l3c_pmu->pmu = (struct pmu) { l3c_pmu 398 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c ret = perf_pmu_register(&l3c_pmu->pmu, name, -1); l3c_pmu 400 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c dev_err(l3c_pmu->dev, "L3C PMU register failed!\n"); l3c_pmu 402 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c &l3c_pmu->node); l3c_pmu 410 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c struct hisi_pmu *l3c_pmu = platform_get_drvdata(pdev); l3c_pmu 412 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c perf_pmu_unregister(&l3c_pmu->pmu); l3c_pmu 414 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c &l3c_pmu->node);