l1d 50 arch/powerpc/include/asm/cache.h struct ppc_cache_info l1d; l1d 60 arch/powerpc/include/asm/cache.h return ppc64_caches.l1d.log_block_size; l1d 65 arch/powerpc/include/asm/cache.h return ppc64_caches.l1d.block_size; l1d 144 arch/powerpc/include/asm/elf.h NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size); \ l1d 145 arch/powerpc/include/asm/elf.h NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d)); \ l1d 48 arch/powerpc/include/asm/page_64.h iterations = ppc64_caches.l1d.blocks_per_page / 8; l1d 55 arch/powerpc/include/asm/page_64.h onex = ppc64_caches.l1d.block_size; l1d 172 arch/powerpc/kernel/asm-offsets.c OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size); l1d 173 arch/powerpc/kernel/asm-offsets.c OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size); l1d 174 arch/powerpc/kernel/asm-offsets.c OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page); l1d 81 arch/powerpc/kernel/setup_64.c .l1d = { l1d 587 arch/powerpc/kernel/setup_64.c init_cache_info(&ppc64_caches.l1d, 0x10000, 128, 128, 64); l1d 598 arch/powerpc/kernel/setup_64.c if (!parse_cache_info(cpu, false, &ppc64_caches.l1d)) l1d 622 arch/powerpc/kernel/setup_64.c dcache_bsize = ppc64_caches.l1d.block_size; l1d 912 arch/powerpc/kernel/setup_64.c l1d_size = ppc64_caches.l1d.size; l1d 717 arch/powerpc/kernel/vdso.c vdso_data->dcache_size = ppc64_caches.l1d.size; l1d 718 arch/powerpc/kernel/vdso.c vdso_data->dcache_line_size = ppc64_caches.l1d.line_size; l1d 721 arch/powerpc/kernel/vdso.c vdso_data->dcache_block_size = ppc64_caches.l1d.block_size; l1d 723 arch/powerpc/kernel/vdso.c vdso_data->dcache_log_block_size = ppc64_caches.l1d.log_block_size; l1d 887 arch/powerpc/lib/sstep.c size = ppc64_caches.l1d.block_size; l1d 236 arch/x86/kernel/cpu/cacheinfo.c union l1_cache l1i, l1d; l1d 239 arch/x86/kernel/cpu/cacheinfo.c union l1_cache *l1 = &l1d; l1d 245 arch/x86/kernel/cpu/cacheinfo.c cpuid(0x80000005, &dummy, &dummy, &l1d.val, &l1i.val); l1d 724 arch/x86/kernel/cpu/cacheinfo.c unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; l1d 817 arch/x86/kernel/cpu/cacheinfo.c l1d += cache_table[k].size; l1d 840 arch/x86/kernel/cpu/cacheinfo.c l1d = new_l1d; l1d 871 arch/x86/kernel/cpu/cacheinfo.c c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));