kn0x_erraddr       31 arch/mips/dec/ecc-berr.c static volatile u32 *kn0x_erraddr;
kn0x_erraddr       36 arch/mips/dec/ecc-berr.c 	*kn0x_erraddr = 0;			/* any write clears the IRQ */
kn0x_erraddr       61 arch/mips/dec/ecc-berr.c 	u32 erraddr = *kn0x_erraddr;
kn0x_erraddr      229 arch/mips/dec/ecc-berr.c 	kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
kn0x_erraddr      248 arch/mips/dec/ecc-berr.c 	kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR);