kms 504 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, kms 512 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c kms->n_crtcs = 0; kms 515 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc = &kms->crtcs[kms->n_crtcs]; kms 527 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c kms->n_crtcs, master->id, str); kms 529 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c kms->n_crtcs++; kms 536 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) kms 541 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_for_each_plane(plane, &kms->base) { kms 554 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static int komeda_crtc_add(struct komeda_kms_dev *kms, kms 560 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c err = drm_crtc_init_with_planes(&kms->base, crtc, kms 561 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c get_crtc_primary(kms, kcrtc), NULL, kms 574 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) kms 578 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c for (i = 0; i < kms->n_crtcs; i++) { kms 579 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c err = komeda_crtc_add(kms, &kms->crtcs[i]); kms 17 drivers/gpu/drm/arm/display/komeda/komeda_drv.c struct komeda_kms_dev *kms; kms 34 drivers/gpu/drm/arm/display/komeda/komeda_drv.c komeda_kms_detach(mdrv->kms); kms 56 drivers/gpu/drm/arm/display/komeda/komeda_drv.c mdrv->kms = komeda_kms_attach(mdrv->mdev); kms 57 drivers/gpu/drm/arm/display/komeda/komeda_drv.c if (IS_ERR(mdrv->kms)) { kms 58 drivers/gpu/drm/arm/display/komeda/komeda_drv.c err = PTR_ERR(mdrv->kms); kms 42 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct komeda_kms_dev *kms = to_kdev(drm); kms 52 drivers/gpu/drm/arm/display/komeda/komeda_kms.c for (i = 0; i < kms->n_crtcs; i++) kms 53 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_crtc_handle_event(&kms->crtcs[i], &evts); kms 239 drivers/gpu/drm/arm/display/komeda/komeda_kms.c static void komeda_kms_mode_config_init(struct komeda_kms_dev *kms, kms 242 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_mode_config *config = &kms->base.mode_config; kms 244 drivers/gpu/drm/arm/display/komeda/komeda_kms.c drm_mode_config_init(&kms->base); kms 246 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_kms_setup_crtcs(kms, mdev); kms 261 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct komeda_kms_dev *kms = kzalloc(sizeof(*kms), GFP_KERNEL); kms 265 drivers/gpu/drm/arm/display/komeda/komeda_kms.c if (!kms) kms 268 drivers/gpu/drm/arm/display/komeda/komeda_kms.c drm = &kms->base; kms 275 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_kms_mode_config_init(kms, mdev); kms 277 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = komeda_kms_add_private_objs(kms, mdev); kms 281 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = komeda_kms_add_planes(kms, mdev); kms 285 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = drm_vblank_init(drm, kms->n_crtcs); kms 289 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = komeda_kms_add_crtcs(kms, mdev); kms 293 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = komeda_kms_add_wb_connectors(kms, mdev); kms 297 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = component_bind_all(mdev->dev, kms); kms 321 drivers/gpu/drm/arm/display/komeda/komeda_kms.c return kms; kms 331 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_kms_cleanup_private_objs(kms); kms 335 drivers/gpu/drm/arm/display/komeda/komeda_kms.c kfree(kms); kms 339 drivers/gpu/drm/arm/display/komeda/komeda_kms.c void komeda_kms_detach(struct komeda_kms_dev *kms) kms 341 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_device *drm = &kms->base; kms 351 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_kms_cleanup_private_objs(kms); kms 171 drivers/gpu/drm/arm/display/komeda/komeda_kms.h int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev); kms 173 drivers/gpu/drm/arm/display/komeda/komeda_kms.h int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev); kms 174 drivers/gpu/drm/arm/display/komeda/komeda_kms.h int komeda_kms_add_planes(struct komeda_kms_dev *kms, struct komeda_dev *mdev); kms 175 drivers/gpu/drm/arm/display/komeda/komeda_kms.h int komeda_kms_add_private_objs(struct komeda_kms_dev *kms, kms 177 drivers/gpu/drm/arm/display/komeda/komeda_kms.h int komeda_kms_add_wb_connectors(struct komeda_kms_dev *kms, kms 179 drivers/gpu/drm/arm/display/komeda/komeda_kms.h void komeda_kms_cleanup_private_objs(struct komeda_kms_dev *kms); kms 185 drivers/gpu/drm/arm/display/komeda/komeda_kms.h void komeda_kms_detach(struct komeda_kms_dev *kms); kms 206 drivers/gpu/drm/arm/display/komeda/komeda_plane.c static u32 get_possible_crtcs(struct komeda_kms_dev *kms, kms 213 drivers/gpu/drm/arm/display/komeda/komeda_plane.c for (i = 0; i < kms->n_crtcs; i++) { kms 214 drivers/gpu/drm/arm/display/komeda/komeda_plane.c crtc = &kms->crtcs[i]; kms 224 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_set_crtc_plane_mask(struct komeda_kms_dev *kms, kms 231 drivers/gpu/drm/arm/display/komeda/komeda_plane.c for (i = 0; i < kms->n_crtcs; i++) { kms 232 drivers/gpu/drm/arm/display/komeda/komeda_plane.c kcrtc = &kms->crtcs[i]; kms 240 drivers/gpu/drm/arm/display/komeda/komeda_plane.c static u32 get_plane_type(struct komeda_kms_dev *kms, kms 248 drivers/gpu/drm/arm/display/komeda/komeda_plane.c static int komeda_plane_add(struct komeda_kms_dev *kms, kms 251 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_dev *mdev = kms->base.dev_private; kms 268 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_universal_plane_init(&kms->base, plane, kms 269 drivers/gpu/drm/arm/display/komeda/komeda_plane.c get_possible_crtcs(kms, c->pipeline), kms 272 drivers/gpu/drm/arm/display/komeda/komeda_plane.c get_plane_type(kms, c), kms 313 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_set_crtc_plane_mask(kms, c->pipeline, plane); kms 321 drivers/gpu/drm/arm/display/komeda/komeda_plane.c int komeda_kms_add_planes(struct komeda_kms_dev *kms, struct komeda_dev *mdev) kms 330 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = komeda_plane_add(kms, pipe->layers[j]); kms 48 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_layer_obj_add(struct komeda_kms_dev *kms, kms 58 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, &layer->base.obj, &st->base.obj, kms 90 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_scaler_obj_add(struct komeda_kms_dev *kms, kms 100 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, kms 133 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_compiz_obj_add(struct komeda_kms_dev *kms, kms 143 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, &compiz->base.obj, &st->base.obj, kms 176 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_splitter_obj_add(struct komeda_kms_dev *kms, kms 186 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, kms 219 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_merger_obj_add(struct komeda_kms_dev *kms, kms 229 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, kms 263 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_improc_obj_add(struct komeda_kms_dev *kms, kms 273 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, &improc->base.obj, &st->base.obj, kms 306 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_timing_ctrlr_obj_add(struct komeda_kms_dev *kms, kms 316 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, &ctrlr->base.obj, &st->base.obj, kms 350 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c static int komeda_pipeline_obj_add(struct komeda_kms_dev *kms, kms 360 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c drm_atomic_private_obj_init(&kms->base, &pipe->obj, &st->obj, kms 366 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c int komeda_kms_add_private_objs(struct komeda_kms_dev *kms, kms 375 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_pipeline_obj_add(kms, pipe); kms 380 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_layer_obj_add(kms, pipe->layers[j]); kms 386 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_layer_obj_add(kms, pipe->wb_layer); kms 392 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_scaler_obj_add(kms, pipe->scalers[j]); kms 397 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_compiz_obj_add(kms, pipe->compiz); kms 402 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_splitter_obj_add(kms, pipe->splitter); kms 408 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_merger_obj_add(kms, pipe->merger); kms 413 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_improc_obj_add(kms, pipe->improc); kms 417 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c err = komeda_timing_ctrlr_obj_add(kms, pipe->ctrlr); kms 425 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c void komeda_kms_cleanup_private_objs(struct komeda_kms_dev *kms) kms 427 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c struct drm_mode_config *config = &kms->base.mode_config; kms 138 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c static int komeda_wb_connector_add(struct komeda_kms_dev *kms, kms 141 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c struct komeda_dev *mdev = kms->base.dev_private; kms 163 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c err = drm_writeback_connector_init(&kms->base, wb_conn, kms 180 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c int komeda_kms_add_wb_connectors(struct komeda_kms_dev *kms, kms 185 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c for (i = 0; i < kms->n_crtcs; i++) { kms 186 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c err = komeda_wb_connector_add(kms, &kms->crtcs[i]); kms 42 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!priv || !priv->kms) { kms 47 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c return to_dpu_kms(priv->kms); kms 66 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms, kms 73 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!kms || !kms->catalog || !crtc || !state || !perf) { kms 82 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c perf->bw_ctl = kms->catalog->perf.max_bw_high * kms 85 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c perf->core_clk_rate = kms->perf.max_core_clk_rate; kms 86 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) { kms 90 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { kms 91 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c perf->bw_ctl = kms->perf.fix_core_ab_vote; kms 92 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c perf->max_per_pipe_ib = kms->perf.fix_core_ib_vote; kms 93 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c perf->core_clk_rate = kms->perf.fix_core_clk_rate; kms 111 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct dpu_kms *kms; kms 118 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); kms 119 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!kms || !kms->catalog) { kms 131 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c _dpu_core_perf_calc_crtc(kms, crtc, state, &dpu_cstate->new_perf); kms 161 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms->catalog->perf.max_bw_low : kms 162 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms->catalog->perf.max_bw_high; kms 181 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, kms 219 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct dpu_kms *kms; kms 226 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); kms 227 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!kms || !kms->catalog) { kms 235 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (atomic_dec_return(&kms->bandwidth_ref) > 0) kms 239 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (kms->perf.enable_bw_release) { kms 243 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c _dpu_core_perf_crtc_update_bus(kms, crtc); kms 247 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static int _dpu_core_perf_set_core_clk_rate(struct dpu_kms *kms, u64 rate) kms 249 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct dss_clk *core_clk = kms->perf.core_clk; kms 258 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) kms 260 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c u64 clk_rate = kms->perf.perf_tune.min_core_clk; kms 264 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c drm_for_each_crtc(crtc, kms->dev) { kms 269 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c clk_rate = clk_round_rate(kms->perf.core_clk->clk, kms 274 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) kms 275 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c clk_rate = kms->perf.fix_core_clk_rate; kms 291 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct dpu_kms *kms; kms 299 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); kms 300 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!kms || !kms->catalog) { kms 304 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c priv = kms->dev->dev_private; kms 310 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c crtc->base.id, stop_req, kms->perf.core_clk_rate); kms 354 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c ret = _dpu_core_perf_crtc_update_bus(kms, crtc); kms 367 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c clk_rate = _dpu_core_perf_get_core_clk_rate(kms); kms 369 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c trace_dpu_core_perf_update_clk(kms->dev, stop_req, clk_rate); kms 371 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c ret = _dpu_core_perf_set_core_clk_rate(kms, clk_rate); kms 374 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms->perf.core_clk->clk_name, clk_rate); kms 378 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms->perf.core_clk_rate = clk_rate; kms 47 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c return to_dpu_kms(priv->kms); kms 1292 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_kms *kms = NULL; kms 1296 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c kms = to_dpu_kms(priv->kms); kms 267 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h int dpu_crtc_register_custom_event(struct dpu_kms *kms, kms 568 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 647 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 705 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 971 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 1101 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 1210 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 1936 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_kms = to_dpu_kms(priv->kms); kms 2181 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms); kms 920 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c const struct msm_kms *kms, kms 1015 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c struct msm_kms *kms, kms 31 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h struct msm_kms *kms, kms 46 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h const struct msm_kms *kms, kms 49 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_kms_hw_init(struct msm_kms *kms); kms 70 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *kms = (struct dpu_kms *)s->private; kms 75 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms->dev || !kms->dev->dev_private || !kms->hw_mdp) { kms 80 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv = kms->dev->dev_private; kms 83 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c pm_runtime_get_sync(&kms->pdev->dev); kms 86 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (kms->hw_mdp->ops.get_danger_status) kms 87 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, kms 91 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (kms->hw_mdp->ops.get_danger_status) kms 92 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, kms 95 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c pm_runtime_put_sync(&kms->pdev->dev); kms 222 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) kms 224 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 243 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 248 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 253 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_enable_commit(struct msm_kms *kms) kms 255 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 259 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_disable_commit(struct msm_kms *kms) kms 261 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 265 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static ktime_t dpu_kms_vsync_time(struct msm_kms *kms, struct drm_crtc *crtc) kms 279 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_prepare_commit(struct msm_kms *kms, kms 290 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms) kms 292 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms = to_dpu_kms(kms); kms 308 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask) kms 310 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 345 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask) kms 347 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 358 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_wait_for_commit_done(struct msm_kms *kms, kms 365 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms || !crtc || !crtc->state) { kms 399 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_wait_flush(struct msm_kms *kms, unsigned crtc_mask) kms 401 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 405 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms_wait_for_commit_done(kms, crtc); kms 576 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static long dpu_kms_round_pixclk(struct msm_kms *kms, unsigned long rate, kms 632 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_destroy(struct msm_kms *kms) kms 636 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms) { kms 641 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms = to_dpu_kms(kms); kms 646 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void _dpu_kms_set_encoder_mode(struct msm_kms *kms, kms 674 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static irqreturn_t dpu_irq(struct msm_kms *kms) kms 676 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 681 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_irq_preinstall(struct msm_kms *kms) kms 683 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 688 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_irq_uninstall(struct msm_kms *kms) kms 690 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct dpu_kms *dpu_kms = to_dpu_kms(kms); kms 792 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_kms_hw_init(struct msm_kms *kms) kms 799 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms) { kms 804 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms = to_dpu_kms(kms); kms 983 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms = to_dpu_kms(priv->kms); kms 1024 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->kms = &dpu_kms->base; kms 144 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h ((struct msm_drm_private *)((D)->dev_private))->kms : NULL) kms 225 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 226 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 126 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c return to_dpu_kms(priv->kms); kms 422 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); kms 423 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct msm_gem_address_space *aspace = kms->base.aspace; kms 769 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); kms 778 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pstate->aspace = kms->base.aspace; kms 1251 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = file->private_data; kms 1255 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c len = scnprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl); kms 1260 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_danger_state(struct dpu_kms *kms, bool enable) kms 1264 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_for_each_plane(plane, kms->dev) { kms 1286 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = file->private_data; kms 1297 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_danger_state(kms, false); kms 1298 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms->has_danger_ctrl = false; kms 1302 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms->has_danger_ctrl = true; kms 1303 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_danger_state(kms, true); kms 1318 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = _dpu_plane_get_kms(plane); kms 1335 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms); kms 1344 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms); kms 1359 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms); kms 1384 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms, &dpu_plane_danger_enable); kms 1462 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = to_dpu_kms(priv->kms); kms 1488 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu->pipe_hw = dpu_hw_sspp_init(pipe, kms->mmio, kms->catalog, kms 1522 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu->catalog = kms->catalog; kms 1524 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (kms->catalog->mixer_count && kms 1525 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c kms->catalog->mixer[0].sblk->maxblendstages) { kms 1526 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c zpos_max = kms->catalog->mixer[0].sblk->maxblendstages - 1; kms 64 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 119 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct msm_kms *kms = &mdp4_kms->base.base; kms 121 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c msm_gem_unpin_iova(val, kms->aspace); kms 358 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct msm_kms *kms = &mdp4_kms->base.base; kms 371 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c msm_gem_get_and_pin_iova(next_bo, kms->aspace, &iova); kms 408 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct msm_kms *kms = &mdp4_kms->base.base; kms 429 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c ret = msm_gem_get_and_pin_iova(cursor_bo, kms->aspace, &iova); kms 24 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 25 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 35 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c void mdp4_irq_preinstall(struct msm_kms *kms) kms 37 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 44 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c int mdp4_irq_postinstall(struct msm_kms *kms) kms 46 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp_kms *mdp_kms = to_mdp_kms(kms); kms 59 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c void mdp4_irq_uninstall(struct msm_kms *kms) kms 61 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 67 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c irqreturn_t mdp4_irq(struct msm_kms *kms) kms 69 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp_kms *mdp_kms = to_mdp_kms(kms); kms 91 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 93 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 96 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c mdp_update_vblank_mask(to_mdp_kms(kms), kms 103 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 105 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 108 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c mdp_update_vblank_mask(to_mdp_kms(kms), kms 18 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static int mdp4_hw_init(struct msm_kms *kms) kms 20 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 99 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_enable_commit(struct msm_kms *kms) kms 101 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 105 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_disable_commit(struct msm_kms *kms) kms 107 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 111 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state) kms 122 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask) kms 127 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_wait_flush(struct msm_kms *kms, unsigned crtc_mask) kms 129 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 136 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_complete_commit(struct msm_kms *kms, unsigned crtc_mask) kms 138 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 146 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate, kms 164 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_destroy(struct msm_kms *kms) kms 166 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); kms 168 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct msm_gem_address_space *aspace = kms->aspace; kms 171 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace); kms 424 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct msm_kms *kms = NULL; kms 437 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c kms = &mdp4_kms->base.base; kms 454 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c kms->irq = irq; kms 525 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c kms->aspace = aspace; kms 551 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c ret = msm_gem_get_and_pin_iova(mdp4_kms->blank_cursor_bo, kms->aspace, kms 563 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c return kms; kms 566 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c if (kms) kms 567 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c mdp4_destroy(kms); kms 160 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_irq_preinstall(struct msm_kms *kms); kms 161 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h int mdp4_irq_postinstall(struct msm_kms *kms); kms 162 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_irq_uninstall(struct msm_kms *kms); kms 163 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h irqreturn_t mdp4_irq(struct msm_kms *kms); kms 164 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 165 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 30 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 22 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 56 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c return to_mdp4_kms(to_mdp_kms(priv->kms)); kms 97 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct msm_kms *kms = &mdp4_kms->base.base; kms 104 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c msm_framebuffer_cleanup(fb, kms->aspace); kms 142 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct msm_kms *kms = &mdp4_kms->base.base; kms 154 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c msm_framebuffer_iova(fb, kms->aspace, 0)); kms 156 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c msm_framebuffer_iova(fb, kms->aspace, 1)); kms 158 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c msm_framebuffer_iova(fb, kms->aspace, 2)); kms 160 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c msm_framebuffer_iova(fb, kms->aspace, 3)); kms 14 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 70 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 166 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct msm_kms *kms = &mdp5_kms->base.base; kms 168 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c msm_gem_unpin_iova(val, kms->aspace); kms 865 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct msm_kms *kms = &mdp5_kms->base.base; kms 904 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = msm_gem_get_and_pin_iova(cursor_bo, kms->aspace, kms 79 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 16 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 39 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c void mdp5_irq_preinstall(struct msm_kms *kms) kms 41 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 50 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c int mdp5_irq_postinstall(struct msm_kms *kms) kms 52 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp_kms *mdp_kms = to_mdp_kms(kms); kms 70 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c void mdp5_irq_uninstall(struct msm_kms *kms) kms 72 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 80 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c irqreturn_t mdp5_irq(struct msm_kms *kms) kms 82 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp_kms *mdp_kms = to_mdp_kms(kms); kms 104 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 106 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 110 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c mdp_update_vblank_mask(to_mdp_kms(kms), kms 117 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) kms 119 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 123 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c mdp_update_vblank_mask(to_mdp_kms(kms), kms 26 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static int mdp5_hw_init(struct msm_kms *kms) kms 28 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 89 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); kms 149 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_enable_commit(struct msm_kms *kms) kms 151 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 155 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_disable_commit(struct msm_kms *kms) kms 157 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 161 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state) kms 163 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 172 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_flush_commit(struct msm_kms *kms, unsigned crtc_mask) kms 177 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_wait_flush(struct msm_kms *kms, unsigned crtc_mask) kms 179 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 186 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_complete_commit(struct msm_kms *kms, unsigned crtc_mask) kms 188 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 197 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static long mdp5_round_pixclk(struct msm_kms *kms, unsigned long rate, kms 203 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static int mdp5_set_split_display(struct msm_kms *kms, kms 216 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_set_encoder_mode(struct msm_kms *kms, kms 223 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_kms_destroy(struct msm_kms *kms) kms 225 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 226 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct msm_gem_address_space *aspace = kms->aspace; kms 248 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); kms 265 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static int mdp5_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) kms 684 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct msm_kms *kms; kms 690 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c kms = priv->kms; kms 691 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (!kms) kms 694 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); kms 707 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c kms->irq = irq; kms 738 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c kms->aspace = aspace; kms 772 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c return kms; kms 774 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (kms) kms 775 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c mdp5_kms_destroy(kms); kms 1036 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c priv->kms = &mdp5_kms->base.base; kms 264 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_irq_preinstall(struct msm_kms *kms); kms 265 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h int mdp5_irq_postinstall(struct msm_kms *kms); kms 266 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_irq_uninstall(struct msm_kms *kms); kms 267 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h irqreturn_t mdp5_irq(struct msm_kms *kms); kms 268 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 269 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); kms 43 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); kms 15 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); kms 125 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); kms 29 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 243 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct msm_kms *kms = &mdp5_kms->base.base; kms 250 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c msm_framebuffer_cleanup(fb, kms->aspace); kms 538 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct msm_kms *kms = &mdp5_kms->base.base; kms 549 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c msm_framebuffer_iova(fb, kms->aspace, 0)); kms 551 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c msm_framebuffer_iova(fb, kms->aspace, 1)); kms 553 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c msm_framebuffer_iova(fb, kms->aspace, 2)); kms 555 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c msm_framebuffer_iova(fb, kms->aspace, 3)); kms 36 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c return to_mdp5_kms(to_mdp_kms(priv->kms)); kms 163 drivers/gpu/drm/msm/disp/mdp_format.c const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, kms 90 drivers/gpu/drm/msm/disp/mdp_kms.h const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, uint64_t modifier); kms 1072 drivers/gpu/drm/msm/dsi/dsi_host.c priv->kms->aspace, kms 1117 drivers/gpu/drm/msm/dsi/dsi_host.c msm_gem_unpin_iova(msm_host->tx_gem_obj, priv->kms->aspace); kms 1248 drivers/gpu/drm/msm/dsi/dsi_host.c priv->kms->aspace, dma_base); kms 238 drivers/gpu/drm/msm/dsi/dsi_manager.c struct msm_kms *kms = priv->kms; kms 241 drivers/gpu/drm/msm/dsi/dsi_manager.c if (encoder && kms->funcs->set_encoder_mode) kms 242 drivers/gpu/drm/msm/dsi/dsi_manager.c kms->funcs->set_encoder_mode(kms, encoder, kms 249 drivers/gpu/drm/msm/dsi/dsi_manager.c struct msm_kms *kms = priv->kms; kms 285 drivers/gpu/drm/msm/dsi/dsi_manager.c if (other_dsi && other_dsi->panel && kms->funcs->set_split_display) { kms 286 drivers/gpu/drm/msm/dsi/dsi_manager.c kms->funcs->set_split_display(kms, master_dsi->encoder, kms 346 drivers/gpu/drm/msm/dsi/dsi_manager.c struct msm_kms *kms = priv->kms; kms 351 drivers/gpu/drm/msm/dsi/dsi_manager.c actual = kms->funcs->round_pixclk(kms, requested, encoder); kms 64 drivers/gpu/drm/msm/edp/edp_connector.c struct msm_kms *kms = priv->kms; kms 68 drivers/gpu/drm/msm/edp/edp_connector.c actual = kms->funcs->round_pixclk(kms, kms 385 drivers/gpu/drm/msm/hdmi/hdmi_connector.c struct msm_kms *kms = priv->kms; kms 389 drivers/gpu/drm/msm/hdmi/hdmi_connector.c actual = kms->funcs->round_pixclk(kms, kms 20 drivers/gpu/drm/msm/msm_atomic.c struct msm_kms *kms = priv->kms; kms 27 drivers/gpu/drm/msm/msm_atomic.c return msm_framebuffer_prepare(new_state->fb, kms->aspace); kms 30 drivers/gpu/drm/msm/msm_atomic.c static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx) kms 36 drivers/gpu/drm/msm/msm_atomic.c mutex_lock(&kms->commit_lock); kms 38 drivers/gpu/drm/msm/msm_atomic.c if (!(kms->pending_crtc_mask & crtc_mask)) { kms 39 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 43 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask &= ~crtc_mask; kms 45 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->enable_commit(kms); kms 51 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->flush_commit(kms, crtc_mask); kms 52 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 58 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); kms 61 drivers/gpu/drm/msm/msm_atomic.c mutex_lock(&kms->commit_lock); kms 62 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->complete_commit(kms, crtc_mask); kms 63 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 64 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->disable_commit(kms); kms 74 drivers/gpu/drm/msm/msm_atomic.c struct msm_drm_private *priv = timer->kms->dev->dev_private; kms 86 drivers/gpu/drm/msm/msm_atomic.c msm_atomic_async_commit(timer->kms, timer->crtc_idx); kms 90 drivers/gpu/drm/msm/msm_atomic.c struct msm_kms *kms, int crtc_idx) kms 92 drivers/gpu/drm/msm/msm_atomic.c timer->kms = kms; kms 146 drivers/gpu/drm/msm/msm_atomic.c struct msm_kms *kms = priv->kms; kms 149 drivers/gpu/drm/msm/msm_atomic.c bool async = kms->funcs->vsync_time && kms 154 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->enable_commit(kms); kms 161 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); kms 164 drivers/gpu/drm/msm/msm_atomic.c mutex_lock(&kms->commit_lock); kms 170 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->prepare_commit(kms, state); kms 181 drivers/gpu/drm/msm/msm_atomic.c &kms->pending_timers[drm_crtc_index(async_crtc)]; kms 190 drivers/gpu/drm/msm/msm_atomic.c if (!(kms->pending_crtc_mask & crtc_mask)) { kms 193 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask |= crtc_mask; kms 195 drivers/gpu/drm/msm/msm_atomic.c vsync_time = kms->funcs->vsync_time(kms, async_crtc); kms 202 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->disable_commit(kms); kms 203 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 222 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask &= ~crtc_mask; kms 228 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->flush_commit(kms, crtc_mask); kms 229 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 235 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); kms 238 drivers/gpu/drm/msm/msm_atomic.c mutex_lock(&kms->commit_lock); kms 239 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->complete_commit(kms, crtc_mask); kms 240 drivers/gpu/drm/msm/msm_atomic.c mutex_unlock(&kms->commit_lock); kms 241 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->disable_commit(kms); kms 235 drivers/gpu/drm/msm/msm_debugfs.c if (priv->kms && priv->kms->funcs->debugfs_init) { kms 236 drivers/gpu/drm/msm/msm_debugfs.c ret = priv->kms->funcs->debugfs_init(priv->kms, minor); kms 180 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 183 drivers/gpu/drm/msm/msm_drv.c kms->funcs->enable_vblank(kms, priv->crtcs[vbl_work->crtc_id]); kms 185 drivers/gpu/drm/msm/msm_drv.c kms->funcs->disable_vblank(kms, priv->crtcs[vbl_work->crtc_id]); kms 215 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 264 drivers/gpu/drm/msm/msm_drv.c if (kms && kms->funcs) kms 265 drivers/gpu/drm/msm/msm_drv.c kms->funcs->destroy(kms); kms 388 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms; kms 456 drivers/gpu/drm/msm/msm_drv.c kms = mdp4_kms_init(ddev); kms 457 drivers/gpu/drm/msm/msm_drv.c priv->kms = kms; kms 460 drivers/gpu/drm/msm/msm_drv.c kms = mdp5_kms_init(ddev); kms 463 drivers/gpu/drm/msm/msm_drv.c kms = dpu_kms_init(ddev); kms 464 drivers/gpu/drm/msm/msm_drv.c priv->kms = kms; kms 469 drivers/gpu/drm/msm/msm_drv.c kms = NULL; kms 473 drivers/gpu/drm/msm/msm_drv.c if (IS_ERR(kms)) { kms 475 drivers/gpu/drm/msm/msm_drv.c ret = PTR_ERR(kms); kms 476 drivers/gpu/drm/msm/msm_drv.c priv->kms = NULL; kms 483 drivers/gpu/drm/msm/msm_drv.c if (kms) { kms 484 drivers/gpu/drm/msm/msm_drv.c kms->dev = ddev; kms 485 drivers/gpu/drm/msm/msm_drv.c ret = kms->funcs->hw_init(kms); kms 529 drivers/gpu/drm/msm/msm_drv.c if (kms) { kms 531 drivers/gpu/drm/msm/msm_drv.c ret = drm_irq_install(ddev, kms->irq); kms 546 drivers/gpu/drm/msm/msm_drv.c if (kms && fbdev) kms 638 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 639 drivers/gpu/drm/msm/msm_drv.c BUG_ON(!kms); kms 640 drivers/gpu/drm/msm/msm_drv.c return kms->funcs->irq(kms); kms 646 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 647 drivers/gpu/drm/msm/msm_drv.c BUG_ON(!kms); kms 648 drivers/gpu/drm/msm/msm_drv.c kms->funcs->irq_preinstall(kms); kms 654 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 655 drivers/gpu/drm/msm/msm_drv.c BUG_ON(!kms); kms 657 drivers/gpu/drm/msm/msm_drv.c if (kms->funcs->irq_postinstall) kms 658 drivers/gpu/drm/msm/msm_drv.c return kms->funcs->irq_postinstall(kms); kms 666 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 667 drivers/gpu/drm/msm/msm_drv.c BUG_ON(!kms); kms 668 drivers/gpu/drm/msm/msm_drv.c kms->funcs->irq_uninstall(kms); kms 674 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 675 drivers/gpu/drm/msm/msm_drv.c if (!kms) kms 684 drivers/gpu/drm/msm/msm_drv.c struct msm_kms *kms = priv->kms; kms 685 drivers/gpu/drm/msm/msm_drv.c if (!kms) kms 140 drivers/gpu/drm/msm/msm_drv.h struct msm_kms *kms; kms 229 drivers/gpu/drm/msm/msm_drv.h struct msm_kms *kms, int crtc_idx); kms 136 drivers/gpu/drm/msm/msm_fb.c struct msm_kms *kms = priv->kms; kms 147 drivers/gpu/drm/msm/msm_fb.c format = kms->funcs->get_format(kms, mode_cmd->pixel_format, kms 97 drivers/gpu/drm/msm/msm_fbdev.c ret = msm_gem_get_and_pin_iova(bo, priv->kms->aspace, &paddr); kms 25 drivers/gpu/drm/msm/msm_kms.h int (*hw_init)(struct msm_kms *kms); kms 27 drivers/gpu/drm/msm/msm_kms.h void (*irq_preinstall)(struct msm_kms *kms); kms 28 drivers/gpu/drm/msm/msm_kms.h int (*irq_postinstall)(struct msm_kms *kms); kms 29 drivers/gpu/drm/msm/msm_kms.h void (*irq_uninstall)(struct msm_kms *kms); kms 30 drivers/gpu/drm/msm/msm_kms.h irqreturn_t (*irq)(struct msm_kms *kms); kms 31 drivers/gpu/drm/msm/msm_kms.h int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc); kms 32 drivers/gpu/drm/msm/msm_kms.h void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc); kms 59 drivers/gpu/drm/msm/msm_kms.h void (*enable_commit)(struct msm_kms *kms); kms 60 drivers/gpu/drm/msm/msm_kms.h void (*disable_commit)(struct msm_kms *kms); kms 68 drivers/gpu/drm/msm/msm_kms.h ktime_t (*vsync_time)(struct msm_kms *kms, struct drm_crtc *crtc); kms 74 drivers/gpu/drm/msm/msm_kms.h void (*prepare_commit)(struct msm_kms *kms, struct drm_atomic_state *state); kms 81 drivers/gpu/drm/msm/msm_kms.h void (*flush_commit)(struct msm_kms *kms, unsigned crtc_mask); kms 90 drivers/gpu/drm/msm/msm_kms.h void (*wait_flush)(struct msm_kms *kms, unsigned crtc_mask); kms 97 drivers/gpu/drm/msm/msm_kms.h void (*complete_commit)(struct msm_kms *kms, unsigned crtc_mask); kms 104 drivers/gpu/drm/msm/msm_kms.h const struct msm_format *(*get_format)(struct msm_kms *kms, kms 108 drivers/gpu/drm/msm/msm_kms.h int (*check_modified_format)(const struct msm_kms *kms, kms 114 drivers/gpu/drm/msm/msm_kms.h long (*round_pixclk)(struct msm_kms *kms, unsigned long rate, kms 116 drivers/gpu/drm/msm/msm_kms.h int (*set_split_display)(struct msm_kms *kms, kms 120 drivers/gpu/drm/msm/msm_kms.h void (*set_encoder_mode)(struct msm_kms *kms, kms 124 drivers/gpu/drm/msm/msm_kms.h void (*destroy)(struct msm_kms *kms); kms 127 drivers/gpu/drm/msm/msm_kms.h int (*debugfs_init)(struct msm_kms *kms, struct drm_minor *minor); kms 140 drivers/gpu/drm/msm/msm_kms.h struct msm_kms *kms; kms 163 drivers/gpu/drm/msm/msm_kms.h static inline void msm_kms_init(struct msm_kms *kms, kms 168 drivers/gpu/drm/msm/msm_kms.h mutex_init(&kms->commit_lock); kms 169 drivers/gpu/drm/msm/msm_kms.h kms->funcs = funcs; kms 171 drivers/gpu/drm/msm/msm_kms.h for (i = 0; i < ARRAY_SIZE(kms->pending_timers); i++) kms 172 drivers/gpu/drm/msm/msm_kms.h msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); kms 62 drivers/s390/crypto/zcrypt_ccamisc.h u8 kms; /* key material state, 0x03 means wrapped with MK */