LCDOUT8 784 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_GPSR(IP4_3_1, LCDOUT8), LCDOUT8 796 drivers/pinctrl/sh-pfc/pfc-r8a7779.c PINMUX_IPSR_GPSR(IP2_30_28, LCDOUT8), LCDOUT8 1619 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_GPSR(IP14_18_16, LCDOUT8), LCDOUT8 1189 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_GPSR(IP7_23_21, LCDOUT8), LCDOUT8 935 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_IPSR_GPSR(IP4_22_20, LCDOUT8), LCDOUT8 287 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 847 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), LCDOUT8 288 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 854 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), LCDOUT8 292 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 857 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), LCDOUT8 293 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 860 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), LCDOUT8 270 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP6_27_24 FM(D9) FM(MSIOF2_SYNC_A) F_(0, 0) F_(0, 0) FM(VI5_DATA10_A) FM(DU_DG0) FM(RIF3_SYNC_B) FM(HRX3_E) FM(LCDOUT8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 907 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT8), LCDOUT8 214 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP1_31_28 FM(DU_DG0) FM(LCDOUT8) FM(MSIOF3_SCK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) LCDOUT8 583 drivers/pinctrl/sh-pfc/pfc-r8a77995.c PINMUX_IPSR_GPSR(IP1_31_28, LCDOUT8),