kfb 169 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct komeda_fb *kfb, kfb 172 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct drm_framebuffer *fb = &kfb->base; kfb 189 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32(reg, LAYER_FMT, kfb->format_caps->hw_id); kfb 203 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct komeda_fb *kfb = to_kfb(fb); kfb 208 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c d71_layer_update_fb(c, kfb, st->addr); kfb 220 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c addr = st->addr[0] + kfb->offset_payload; kfb 222 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c addr = st->addr[0] + kfb->afbc_size - 1; kfb 231 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c switch (kfb->format_caps->fourcc) { kfb 264 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c if (kfb->is_va) kfb 383 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct komeda_fb *kfb = to_kfb(conn_st->writeback_job->fb); kfb 387 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c d71_layer_update_fb(c, kfb, st->addr); kfb 389 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c if (kfb->is_va) kfb 18 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct komeda_fb *kfb = to_kfb(fb); kfb 25 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfree(kfb); kfb 40 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c komeda_fb_afbc_size_check(struct komeda_fb *kfb, struct drm_file *file, kfb 43 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct drm_framebuffer *fb = &kfb->base; kfb 79 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->aligned_w = ALIGN(fb->width, alignment_w); kfb 80 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->aligned_h = ALIGN(fb->height, alignment_h); kfb 87 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c n_blocks = (kfb->aligned_w * kfb->aligned_h) / AFBC_SUPERBLK_PIXELS; kfb 88 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->offset_payload = ALIGN(n_blocks * AFBC_HEADER_SIZE, kfb 92 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->afbc_size = kfb->offset_payload + n_blocks * kfb 95 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c min_size = kfb->afbc_size + fb->offsets[0]; kfb 111 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c komeda_fb_none_afbc_size_check(struct komeda_dev *mdev, struct komeda_fb *kfb, kfb 115 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct drm_framebuffer *fb = &kfb->base; kfb 121 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (komeda_fb_check_src_coords(kfb, 0, 0, fb->width, fb->height)) kfb 139 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c min_size = komeda_fb_get_pixel_addr(kfb, 0, fb->height, i) kfb 163 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct komeda_fb *kfb; kfb 166 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb = kzalloc(sizeof(*kfb), GFP_KERNEL); kfb 167 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (!kfb) kfb 170 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->format_caps = komeda_get_format_caps(&mdev->fmt_tbl, kfb 173 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (!kfb->format_caps) { kfb 176 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfree(kfb); kfb 180 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c drm_helper_mode_fill_fb_struct(dev, &kfb->base, mode_cmd); kfb 182 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (kfb->base.modifier) kfb 183 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c ret = komeda_fb_afbc_size_check(kfb, file, mode_cmd); kfb 185 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c ret = komeda_fb_none_afbc_size_check(mdev, kfb, file, mode_cmd); kfb 189 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c ret = drm_framebuffer_init(dev, &kfb->base, &komeda_fb_funcs); kfb 196 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfb->is_va = mdev->iommu ? true : false; kfb 198 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c return &kfb->base; kfb 201 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c for (i = 0; i < kfb->base.format->num_planes; i++) kfb 202 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c drm_gem_object_put_unlocked(kfb->base.obj[i]); kfb 204 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c kfree(kfb); kfb 208 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c int komeda_fb_check_src_coords(const struct komeda_fb *kfb, kfb 211 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c const struct drm_framebuffer *fb = &kfb->base; kfb 239 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) kfb 241 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct drm_framebuffer *fb = &kfb->base; kfb 267 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type, kfb 270 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c struct drm_framebuffer *fb = &kfb->base; kfb 41 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h int komeda_fb_check_src_coords(const struct komeda_fb *kfb, kfb 44 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane); kfb 45 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type, kfb 284 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct komeda_fb *kfb, kfb 289 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot)) kfb 304 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (komeda_fb_check_src_coords(kfb, src_x, src_y, src_w, src_h)) kfb 327 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct komeda_fb *kfb = to_kfb(fb); kfb 332 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c err = komeda_layer_check_cfg(layer, kfb, dflow); kfb 346 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->hsize = kfb->aligned_w; kfb 347 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->vsize = kfb->aligned_h; kfb 349 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->afbc_crop_r = kfb->aligned_w - dflow->in_x - dflow->in_w; kfb 351 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->afbc_crop_b = kfb->aligned_h - dflow->in_y - dflow->in_h; kfb 362 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->addr[i] = komeda_fb_get_pixel_addr(kfb, dflow->in_x, kfb 386 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct komeda_fb *kfb = to_kfb(conn_st->writeback_job->fb); kfb 391 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c err = komeda_layer_check_cfg(wb_layer, kfb, dflow); kfb 405 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c for (i = 0; i < kfb->base.format->num_planes; i++) kfb 406 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->addr[i] = komeda_fb_get_pixel_addr(kfb, dflow->out_x,