L1D 1283 arch/alpha/kernel/setup.c int L1I, L1D, L2, L3; L1D 1293 arch/alpha/kernel/setup.c L1D = L1I; L1D 1314 arch/alpha/kernel/setup.c L1I = L1D = CSHAPE(8*1024, 5, 1); L1D 1329 arch/alpha/kernel/setup.c L1I = L1D = CSHAPE(8*1024, 5, 1); L1D 1355 arch/alpha/kernel/setup.c L1D = CSHAPE(8*1024, 5, 1); L1D 1358 arch/alpha/kernel/setup.c L1D = CSHAPE(16*1024, 5, 1); L1D 1381 arch/alpha/kernel/setup.c L1I = L1D = CSHAPE(64*1024, 6, 2); L1D 1388 arch/alpha/kernel/setup.c L1I = L1D = CSHAPE(64*1024, 6, 2); L1D 1395 arch/alpha/kernel/setup.c L1I = L1D = L2 = L3 = 0; L1D 1400 arch/alpha/kernel/setup.c alpha_l1d_cacheshape = L1D; L1D 127 arch/arc/include/asm/perf_event.h [C(L1D)] = { L1D 96 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, L1D 97 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, L1D 98 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, L1D 99 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, L1D 159 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV6MPCORE_PERFCTR_DCACHE_RDACCESS, L1D 160 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DCACHE_RDMISS, L1D 161 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV6MPCORE_PERFCTR_DCACHE_WRACCESS, L1D 162 arch/arm/kernel/perf_event_v6.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DCACHE_WRMISS, L1D 179 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 180 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 181 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 182 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 229 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 230 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 231 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 232 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 266 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 267 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 268 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 269 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 270 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, L1D 271 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, L1D 313 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ, L1D 314 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ, L1D 315 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE, L1D 316 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE, L1D 367 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 368 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 369 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 370 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 411 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L1_DCACHE_ACCESS_READ, L1D 412 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 413 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L1_DCACHE_ACCESS_WRITE, L1D 414 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 472 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 473 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 474 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 475 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 513 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 514 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 515 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, L1D 516 arch/arm/kernel/perf_event_v7.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, L1D 73 arch/arm/kernel/perf_event_xscale.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS, L1D 74 arch/arm/kernel/perf_event_xscale.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS, L1D 75 arch/arm/kernel/perf_event_xscale.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS, L1D 76 arch/arm/kernel/perf_event_xscale.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS, L1D 57 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1D_CACHE, L1D 58 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL, L1D 78 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_A53_PERFCTR_PREF_LINEFILL, L1D 89 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD, L1D 90 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD, L1D 91 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, L1D 92 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR, L1D 106 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD, L1D 107 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, L1D 115 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD, L1D 116 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD, L1D 117 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, L1D 118 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_MISS_ST, L1D 119 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_PREF_ACCESS, L1D 120 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_PREF_MISS, L1D 136 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD, L1D 137 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD, L1D 138 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, L1D 139 arch/arm64/kernel/perf_event.c [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR, L1D 730 arch/csky/kernel/perf_event.c [C(L1D)] = { L1D 875 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 956 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 1031 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 1071 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 1127 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 1186 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 1226 arch/mips/kernel/perf_event_mipsxx.c [C(L1D)] = { L1D 244 arch/nds32/include/asm/pmu.h [C(L1D)] = { L1D 39 arch/powerpc/perf/e500-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 36 arch/powerpc/perf/e6500-pmu.c [C(L1D)] = { L1D 105 arch/powerpc/perf/generic-compat-pmu.c [ C(L1D) ] = { L1D 358 arch/powerpc/perf/mpc7450-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 622 arch/powerpc/perf/power5+-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 564 arch/powerpc/perf/power5-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 485 arch/powerpc/perf/power6-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 336 arch/powerpc/perf/power7-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 257 arch/powerpc/perf/power8-pmu.c [ C(L1D) ] = { L1D 314 arch/powerpc/perf/power9-pmu.c [ C(L1D) ] = { L1D 436 arch/powerpc/perf/ppc970-pmu.c [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */ L1D 56 arch/riscv/kernel/perf_event.c [C(L1D)] = { L1D 91 arch/sh/kernel/cpu/sh4/perf_event.c [ C(L1D) ] = { L1D 116 arch/sh/kernel/cpu/sh4a/perf_event.c [ C(L1D) ] = { L1D 221 arch/sparc/kernel/perf_event.c [C(L1D)] = { L1D 359 arch/sparc/kernel/perf_event.c [C(L1D)] = { L1D 494 arch/sparc/kernel/perf_event.c [C(L1D)] = { L1D 631 arch/sparc/kernel/perf_event.c [C(L1D)] = { L1D 22 arch/x86/events/amd/core.c [ C(L1D) ] = { L1D 126 arch/x86/events/amd/core.c [C(L1D)] = { L1D 425 arch/x86/events/intel/core.c [ C(L1D ) ] = { L1D 653 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 809 arch/x86/events/intel/core.c [ C(L1D ) ] = { L1D 961 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 1144 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 1259 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 1350 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 1501 arch/x86/events/intel/core.c [ C(L1D) ] = { L1D 1635 arch/x86/events/intel/core.c [C(L1D)] = { L1D 1751 arch/x86/events/intel/core.c [C(L1D)] = { L1D 26 arch/x86/events/intel/knc.c [ C(L1D) ] = { L1D 519 arch/x86/events/intel/p4.c [ C(L1D ) ] = { L1D 28 arch/x86/events/intel/p6.c [ C(L1D) ] = { L1D 74 arch/xtensa/kernel/perf_event.c [C(L1D)] = { L1D 525 tools/perf/util/evsel.c [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),