jreg              195 drivers/gpu/drm/ast/ast_dp501.c 	u8 jreg;
jreg              249 drivers/gpu/drm/ast/ast_dp501.c 		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xfc); /* D[1:0]: Reserved Video Buffer */
jreg              250 drivers/gpu/drm/ast/ast_dp501.c 		jreg |= 0x02;
jreg              251 drivers/gpu/drm/ast/ast_dp501.c 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x99, jreg);
jreg              316 drivers/gpu/drm/ast/ast_dp501.c 	u8 jreg;
jreg              322 drivers/gpu/drm/ast/ast_dp501.c 	jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
jreg              323 drivers/gpu/drm/ast/ast_dp501.c 	if (!(jreg & 0x80)) {
jreg              416 drivers/gpu/drm/ast/ast_dp501.c 	u8 jreg;
jreg              419 drivers/gpu/drm/ast/ast_dp501.c 		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
jreg              420 drivers/gpu/drm/ast/ast_dp501.c 		switch (jreg & 0x0e) {
jreg              122 drivers/gpu/drm/ast/ast_main.c 	uint32_t jreg, scu_rev;
jreg              194 drivers/gpu/drm/ast/ast_main.c 		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
jreg              195 drivers/gpu/drm/ast/ast_main.c 		if (!(jreg & 0x80))
jreg              197 drivers/gpu/drm/ast/ast_main.c 		else if (jreg & 0x01)
jreg              226 drivers/gpu/drm/ast/ast_main.c 		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
jreg              227 drivers/gpu/drm/ast/ast_main.c 		if (jreg & 0x80)
jreg              237 drivers/gpu/drm/ast/ast_main.c 		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
jreg              238 drivers/gpu/drm/ast/ast_main.c 		switch (jreg) {
jreg              398 drivers/gpu/drm/ast/ast_main.c 	u8 jreg;
jreg              403 drivers/gpu/drm/ast/ast_main.c 	jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);
jreg              404 drivers/gpu/drm/ast/ast_main.c 	switch (jreg & 3) {
jreg              411 drivers/gpu/drm/ast/ast_main.c 	jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff);
jreg              412 drivers/gpu/drm/ast/ast_main.c 	switch (jreg & 0x03) {
jreg              240 drivers/gpu/drm/ast/ast_mode.c 	u8 jreg;
jreg              244 drivers/gpu/drm/ast/ast_mode.c 	jreg = stdtable->misc;
jreg              245 drivers/gpu/drm/ast/ast_mode.c 	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
jreg              250 drivers/gpu/drm/ast/ast_mode.c 		jreg = stdtable->seq[i];
jreg              252 drivers/gpu/drm/ast/ast_mode.c 			jreg |= 0x20;
jreg              253 drivers/gpu/drm/ast/ast_mode.c 		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
jreg              262 drivers/gpu/drm/ast/ast_mode.c 	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
jreg              264 drivers/gpu/drm/ast/ast_mode.c 		jreg = stdtable->ar[i];
jreg              266 drivers/gpu/drm/ast/ast_mode.c 		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
jreg              271 drivers/gpu/drm/ast/ast_mode.c 	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
jreg              469 drivers/gpu/drm/ast/ast_mode.c 	u8 jreg;
jreg              471 drivers/gpu/drm/ast/ast_mode.c 	jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
jreg              472 drivers/gpu/drm/ast/ast_mode.c 	jreg &= ~0xC0;
jreg              473 drivers/gpu/drm/ast/ast_mode.c 	if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
jreg              474 drivers/gpu/drm/ast/ast_mode.c 	if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
jreg              475 drivers/gpu/drm/ast/ast_mode.c 	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
jreg             1082 drivers/gpu/drm/ast/ast_mode.c 	u8 jreg;
jreg             1084 drivers/gpu/drm/ast/ast_mode.c 	jreg = 0x2;
jreg             1086 drivers/gpu/drm/ast/ast_mode.c 	jreg |= 1;
jreg             1087 drivers/gpu/drm/ast/ast_mode.c 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);