isr_offset         71 drivers/mfd/twl4030-irq.c 		u8	isr_offset;
isr_offset         89 drivers/mfd/twl4030-irq.c 		.isr_offset	= TWL4030_ ## modname ## _ISR1, \
isr_offset         93 drivers/mfd/twl4030-irq.c 		.isr_offset	= TWL4030_ ## modname ## _ISR2, \
isr_offset        121 drivers/mfd/twl4030-irq.c 			.isr_offset	= REG_GPIO_ISR1A,
isr_offset        124 drivers/mfd/twl4030-irq.c 			.isr_offset	= REG_GPIO_ISR1B,
isr_offset        145 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL4030_INTERRUPTS_BCIISR1A,
isr_offset        148 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL4030_INTERRUPTS_BCIISR1B,
isr_offset        181 drivers/mfd/twl4030-irq.c 			.isr_offset	= REG_GPIO_ISR1A,
isr_offset        184 drivers/mfd/twl4030-irq.c 			.isr_offset	= REG_GPIO_ISR1B,
isr_offset        204 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL5031_INTERRUPTS_BCIISR1,
isr_offset        207 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL5031_INTERRUPTS_BCIISR2,
isr_offset        236 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL5031_ACIIDR_LSB,
isr_offset        253 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL5031_ACCISR1,
isr_offset        256 drivers/mfd/twl4030-irq.c 			.isr_offset	= TWL5031_ACCISR2,
isr_offset        384 drivers/mfd/twl4030-irq.c 				sih->mask[line].isr_offset, sih->bytes_ixr);
isr_offset        391 drivers/mfd/twl4030-irq.c 					sih->mask[line].isr_offset,
isr_offset        571 drivers/mfd/twl4030-irq.c 			sih->mask[irq_line].isr_offset, sih->bytes_ixr);