irr               144 arch/arm/mach-sa1100/neponset.c 	unsigned int irr;
irr               157 arch/arm/mach-sa1100/neponset.c 		irr = readb_relaxed(d->base + IRR);
irr               158 arch/arm/mach-sa1100/neponset.c 		irr ^= IRR_ETHERNET | IRR_USAR;
irr               160 arch/arm/mach-sa1100/neponset.c 		if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
irr               168 arch/arm/mach-sa1100/neponset.c 		if (irr & (IRR_ETHERNET | IRR_USAR)) {
irr               179 arch/arm/mach-sa1100/neponset.c 			if (irr & IRR_ETHERNET)
irr               182 arch/arm/mach-sa1100/neponset.c 			if (irr & IRR_USAR)
irr               188 arch/arm/mach-sa1100/neponset.c 		if (irr & IRR_SA1111)
irr               555 arch/ia64/include/asm/processor.h 	u64 irr;
irr               558 arch/ia64/include/asm/processor.h 	case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
irr               559 arch/ia64/include/asm/processor.h 	case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
irr               560 arch/ia64/include/asm/processor.h 	case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
irr               561 arch/ia64/include/asm/processor.h 	case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
irr               564 arch/ia64/include/asm/processor.h 	return test_bit(bit, &irr);
irr               460 arch/x86/include/asm/apic.h 	u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
irr               462 arch/x86/include/asm/apic.h 	return !!(irr & (1U << (vector % 32)));
irr               269 arch/x86/include/asm/apicdef.h 	} irr [8];
irr                76 arch/x86/include/asm/io_apic.h 		irr		:  1,
irr                91 arch/x86/include/asm/io_apic.h 		irr		: 1,
irr              1093 arch/x86/include/asm/kvm_host.h 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
irr                66 arch/x86/include/uapi/asm/kvm.h 	__u8 irr;		/* interrupt request register */
irr                88 arch/x86/include/uapi/asm/kvm.h 	__u32 irr;
irr              1533 arch/x86/kernel/apic/apic.c static bool apic_check_and_ack(union apic_ir *irr, union apic_ir *isr)
irr              1539 arch/x86/kernel/apic/apic.c 		irr->regs[i] = apic_read(APIC_IRR + i * 0x10);
irr              1561 arch/x86/kernel/apic/apic.c 	return !bitmap_empty(irr->map, APIC_IR_BITS);
irr              1580 arch/x86/kernel/apic/apic.c 	union apic_ir irr, isr;
irr              1585 arch/x86/kernel/apic/apic.c 		if (!apic_check_and_ack(&irr, &isr))
irr              1589 arch/x86/kernel/apic/apic.c 	pr_warn("APIC: Stale IRR: %256pb ISR: %256pb\n", irr.map, isr.map);
irr               564 arch/x86/kernel/apic/io_apic.c 	if (entry.irr) {
irr               587 arch/x86/kernel/apic/io_apic.c 	if (entry.irr)
irr              1249 arch/x86/kernel/apic/io_apic.c 			 entry.vector, entry.irr, entry.delivery_status);
irr              1935 arch/x86/kernel/apic/io_apic.c 		if (rentry.irr && rentry.trigger) {
irr               867 arch/x86/kernel/apic/vector.c 		unsigned int irr, vector = apicd->prev_vector;
irr               878 arch/x86/kernel/apic/vector.c 		irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
irr               879 arch/x86/kernel/apic/vector.c 		if (irr & (1U << (vector % 32))) {
irr               349 arch/x86/kernel/irq.c 	unsigned int irr, vector;
irr               376 arch/x86/kernel/irq.c 		irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
irr               377 arch/x86/kernel/irq.c 		if (irr  & (1 << (vector % 32))) {
irr                95 arch/x86/kvm/i8259.c 			ret = !(s->irr & mask);
irr                96 arch/x86/kvm/i8259.c 			s->irr |= mask;
irr                99 arch/x86/kvm/i8259.c 			s->irr &= ~mask;
irr               105 arch/x86/kvm/i8259.c 				ret = !(s->irr & mask);
irr               106 arch/x86/kvm/i8259.c 				s->irr |= mask;
irr               137 arch/x86/kvm/i8259.c 	mask = s->irr & ~s->imr;
irr               224 arch/x86/kvm/i8259.c 		s->irr &= ~(1 << irq);
irr               275 arch/x86/kvm/i8259.c 	u8 edge_irr = s->irr & ~s->elcr;
irr               279 arch/x86/kvm/i8259.c 	s->irr &= s->elcr;
irr               406 arch/x86/kvm/i8259.c 			s->pics_state->pics[0].irr &= ~(1 << 2);
irr               408 arch/x86/kvm/i8259.c 		s->irr &= ~(1 << ret);
irr               433 arch/x86/kvm/i8259.c 				ret = s->irr;
irr               185 arch/x86/kvm/ioapic.c 		ioapic->irr &= ~mask;
irr               207 arch/x86/kvm/ioapic.c 	old_irr = ioapic->irr;
irr               208 arch/x86/kvm/ioapic.c 	ioapic->irr |= mask;
irr               211 arch/x86/kvm/ioapic.c 		if (old_irr == ioapic->irr) {
irr               224 arch/x86/kvm/ioapic.c static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
irr               229 arch/x86/kvm/ioapic.c 	for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
irr               325 arch/x86/kvm/ioapic.c 		    && ioapic->irr & (1 << index))
irr               414 arch/x86/kvm/ioapic.c 		if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
irr               458 arch/x86/kvm/ioapic.c 		if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
irr               596 arch/x86/kvm/ioapic.c 	ioapic->irr = 0;
irr               655 arch/x86/kvm/ioapic.c 	state->irr &= ~ioapic->irr_delivered;
irr               665 arch/x86/kvm/ioapic.c 	ioapic->irr = 0;
irr               668 arch/x86/kvm/ioapic.c 	kvm_ioapic_inject_all(ioapic, state->irr);
irr                82 arch/x86/kvm/ioapic.h 	u32 irr;
irr                31 arch/x86/kvm/irq.h 	u8 irr;		/* interrupt request register */
irr              5137 arch/x86/kvm/svm.c static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
irr              5147 arch/x86/kvm/svm.c 	if (irr == -1)
irr              5150 arch/x86/kvm/svm.c 	if (tpr >= irr)
irr              6016 arch/x86/kvm/vmx/vmx.c static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
irr              6024 arch/x86/kvm/vmx/vmx.c 	if (irr == -1 || tpr < irr) {
irr              6029 arch/x86/kvm/vmx/vmx.c 	vmcs_write32(TPR_THRESHOLD, irr);
irr               132 drivers/crypto/ccree/cc_driver.c 	u32 irr;
irr               141 drivers/crypto/ccree/cc_driver.c 	irr = cc_ioread(drvdata, CC_REG(HOST_IRR));
irr               142 drivers/crypto/ccree/cc_driver.c 	dev_dbg(dev, "Got IRR=0x%08X\n", irr);
irr               144 drivers/crypto/ccree/cc_driver.c 	if (irr == 0) /* Probably shared interrupt line */
irr               150 drivers/crypto/ccree/cc_driver.c 	cc_iowrite(drvdata, CC_REG(HOST_ICR), irr);
irr               152 drivers/crypto/ccree/cc_driver.c 	drvdata->irq = irr;
irr               154 drivers/crypto/ccree/cc_driver.c 	if (irr & drvdata->comp_mask) {
irr               159 drivers/crypto/ccree/cc_driver.c 		irr &= ~drvdata->comp_mask;
irr               164 drivers/crypto/ccree/cc_driver.c 	if (irr & CC_GPR0_IRQ_MASK) {
irr               169 drivers/crypto/ccree/cc_driver.c 		irr &= ~CC_GPR0_IRQ_MASK;
irr               174 drivers/crypto/ccree/cc_driver.c 	if (irr & CC_AXI_ERR_IRQ_MASK) {
irr               182 drivers/crypto/ccree/cc_driver.c 		irr &= ~CC_AXI_ERR_IRQ_MASK;
irr               185 drivers/crypto/ccree/cc_driver.c 	if (irr) {
irr               187 drivers/crypto/ccree/cc_driver.c 				    irr);
irr                73 drivers/parisc/gsc.c 	unsigned long irr;
irr                76 drivers/parisc/gsc.c 	irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR);
irr                77 drivers/parisc/gsc.c 	if (irr == 0)
irr                80 drivers/parisc/gsc.c 	DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr);
irr                83 drivers/parisc/gsc.c 		int local_irq = __ffs(irr);
irr                86 drivers/parisc/gsc.c 		irr &= ~(1 << local_irq);
irr                87 drivers/parisc/gsc.c 	} while (irr);
irr              1634 net/netfilter/nf_conntrack_h323_main.c 		       unsigned char **data, InfoRequestResponse *irr)
irr              1646 net/netfilter/nf_conntrack_h323_main.c 				   &irr->rasAddress, 1);
irr              1655 net/netfilter/nf_conntrack_h323_main.c 					irr->callSignalAddress.item,
irr              1656 net/netfilter/nf_conntrack_h323_main.c 					irr->callSignalAddress.count);
irr                66 tools/arch/x86/include/uapi/asm/kvm.h 	__u8 irr;		/* interrupt request register */
irr                88 tools/arch/x86/include/uapi/asm/kvm.h 	__u32 irr;