irq_mask_addr      27 arch/mips/bcm63xx/irq.c static u32 irq_mask_addr[2];
irq_mask_addr      90 arch/mips/bcm63xx/irq.c 		val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
irq_mask_addr     123 arch/mips/bcm63xx/irq.c 		if (!irq_mask_addr[cpu])				\
irq_mask_addr     126 arch/mips/bcm63xx/irq.c 		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
irq_mask_addr     128 arch/mips/bcm63xx/irq.c 		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
irq_mask_addr     145 arch/mips/bcm63xx/irq.c 		if (!irq_mask_addr[cpu])				\
irq_mask_addr     148 arch/mips/bcm63xx/irq.c 		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
irq_mask_addr     153 arch/mips/bcm63xx/irq.c 		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
irq_mask_addr     427 arch/mips/bcm63xx/irq.c 	irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
irq_mask_addr     429 arch/mips/bcm63xx/irq.c 	irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
irq_mask_addr     434 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
irq_mask_addr     436 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] = 0;
irq_mask_addr     443 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
irq_mask_addr     445 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
irq_mask_addr     455 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
irq_mask_addr     457 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] = 0;
irq_mask_addr     464 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
irq_mask_addr     466 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] = 0;
irq_mask_addr     473 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
irq_mask_addr     475 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] = 0;
irq_mask_addr     482 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
irq_mask_addr     484 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
irq_mask_addr     494 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
irq_mask_addr     496 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
irq_mask_addr     506 arch/mips/bcm63xx/irq.c 		irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
irq_mask_addr     508 arch/mips/bcm63xx/irq.c 		irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);