irq_idxs          113 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
irq_idxs          117 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (!dpu_kms || !irq_idxs || !irq_count) {
irq_idxs          122 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
irq_idxs          124 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 		DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
irq_idxs          127 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 		ret = _dpu_core_irq_enable(dpu_kms, irq_idxs[i]);
irq_idxs          168 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
irq_idxs          172 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (!dpu_kms || !irq_idxs || !irq_count) {
irq_idxs          177 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
irq_idxs          179 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 		DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
irq_idxs          182 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 		ret = _dpu_core_irq_disable(dpu_kms, irq_idxs[i]);
irq_idxs           57 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h 		int *irq_idxs,
irq_idxs           72 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h 		int *irq_idxs,