irq_idx_tbl_size   83 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
irq_idx_tbl_size  146 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
irq_idx_tbl_size  221 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
irq_idx_tbl_size  256 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
irq_idx_tbl_size  366 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c 	dpu_kms->irq_obj.total_irqs = dpu_kms->hw_intr->irq_idx_tbl_size;
irq_idx_tbl_size 1101 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	intr->irq_idx_tbl_size = ARRAY_SIZE(dpu_irq_map);
irq_idx_tbl_size  188 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h 	u32 irq_idx_tbl_size;