irq_idx 154 arch/m68k/mac/psc.c int irq_idx = IRQ_IDX(irq); irq_idx 157 arch/m68k/mac/psc.c psc_write_byte(pIER, (1 << irq_idx) | 0x80); irq_idx 162 arch/m68k/mac/psc.c int irq_idx = IRQ_IDX(irq); irq_idx 165 arch/m68k/mac/psc.c psc_write_byte(pIER, 1 << irq_idx); irq_idx 356 arch/m68k/mac/via.c int irq_idx = IRQ_IDX(irq); irq_idx 364 arch/m68k/mac/via.c via2[vDirA] &= 0xC0 | ~(1 << irq_idx); irq_idx 367 arch/m68k/mac/via.c via2[vDirA] &= 0x80 | ~(1 << irq_idx); irq_idx 514 arch/m68k/mac/via.c int irq_idx = IRQ_IDX(irq); irq_idx 517 arch/m68k/mac/via.c via1[vIER] = IER_SET_BIT(irq_idx); irq_idx 520 arch/m68k/mac/via.c via2[gIER] = IER_SET_BIT(irq_idx); irq_idx 525 arch/m68k/mac/via.c nubus_disabled &= ~(1 << irq_idx); irq_idx 534 arch/m68k/mac/via.c via2[rSIER] = IER_SET_BIT(irq_idx); irq_idx 542 arch/m68k/mac/via.c int irq_idx = IRQ_IDX(irq); irq_idx 545 arch/m68k/mac/via.c via1[vIER] = IER_CLR_BIT(irq_idx); irq_idx 547 arch/m68k/mac/via.c via2[gIER] = IER_CLR_BIT(irq_idx); irq_idx 552 arch/m68k/mac/via.c nubus_disabled |= 1 << irq_idx; irq_idx 557 arch/m68k/mac/via.c via2[rSIER] = IER_CLR_BIT(irq_idx); irq_idx 20 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c static void dpu_core_irq_callback_handler(void *arg, int irq_idx) irq_idx 27 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c pr_debug("irq_idx=%d\n", irq_idx); irq_idx 29 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (list_empty(&irq_obj->irq_cb_tbl[irq_idx])) { irq_idx 30 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DRM_ERROR("no registered cb, idx:%d enable_count:%d\n", irq_idx, irq_idx 31 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx])); irq_idx 34 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c atomic_inc(&irq_obj->irq_counts[irq_idx]); irq_idx 40 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c list_for_each_entry(cb, &irq_obj->irq_cb_tbl[irq_idx], list) irq_idx 42 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c cb->func(cb->arg, irq_idx); irq_idx 52 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 71 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx) irq_idx 83 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) { irq_idx 84 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx); irq_idx 88 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]); irq_idx 89 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count); irq_idx 90 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c trace_dpu_core_irq_enable_idx(irq_idx, enable_count); irq_idx 92 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (atomic_inc_return(&dpu_kms->irq_obj.enable_counts[irq_idx]) == 1) { irq_idx 95 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 98 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 100 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret); irq_idx 104 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (list_empty(&dpu_kms->irq_obj.irq_cb_tbl[irq_idx])) irq_idx 106 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 137 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx) irq_idx 146 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) { irq_idx 147 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx); irq_idx 151 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]); irq_idx 152 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count); irq_idx 153 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c trace_dpu_core_irq_disable_idx(irq_idx, enable_count); irq_idx 155 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (atomic_dec_return(&dpu_kms->irq_obj.enable_counts[irq_idx]) == 0) { irq_idx 158 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 161 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx); irq_idx 162 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret); irq_idx 187 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear) irq_idx 193 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (irq_idx < 0) { irq_idx 195 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c __builtin_return_address(0), irq_idx); irq_idx 200 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c irq_idx, clear); irq_idx 203 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx, irq_idx 221 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) { irq_idx 222 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx); irq_idx 226 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx); irq_idx 229 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c trace_dpu_core_irq_register_callback(irq_idx, register_irq_cb); irq_idx 232 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c &dpu_kms->irq_obj.irq_cb_tbl[irq_idx]); irq_idx 238 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx, irq_idx 256 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) { irq_idx 257 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx); irq_idx 261 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx); irq_idx 264 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c trace_dpu_core_irq_unregister_callback(irq_idx, register_irq_cb); irq_idx 267 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c if (list_empty(&dpu_kms->irq_obj.irq_cb_tbl[irq_idx]) && irq_idx 268 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx])) irq_idx 269 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c DPU_ERROR("irq_idx=%d enabled with no callback\n", irq_idx); irq_idx 84 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h int irq_idx, irq_idx 102 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h int irq_idx, irq_idx 120 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h int irq_idx, irq_idx 248 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx); irq_idx 252 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (irq->irq_idx < 0) { irq_idx 261 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0, irq_idx 271 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx, true); irq_idx 278 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->hw_idx, irq->irq_idx, irq_idx 282 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->cb.func(phys_enc, irq->irq_idx); irq_idx 290 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->hw_idx, irq->irq_idx, irq_idx 297 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c intr_idx, irq->hw_idx, irq->irq_idx, irq_idx 317 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (irq->irq_idx >= 0) { irq_idx 324 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx = dpu_core_irq_idx_lookup(phys_enc->dpu_kms, irq_idx 326 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (irq->irq_idx < 0) { irq_idx 333 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c ret = dpu_core_irq_register_callback(phys_enc->dpu_kms, irq->irq_idx, irq_idx 339 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx = -EINVAL; irq_idx 343 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c ret = dpu_core_irq_enable(phys_enc->dpu_kms, &irq->irq_idx, 1); irq_idx 347 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx); irq_idx 349 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx, &irq->cb); irq_idx 350 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx = -EINVAL; irq_idx 355 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->hw_idx, irq->irq_idx); irq_idx 373 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (irq->irq_idx < 0) { irq_idx 376 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx); irq_idx 380 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c ret = dpu_core_irq_disable(phys_enc->dpu_kms, &irq->irq_idx, 1); irq_idx 384 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx, ret); irq_idx 387 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c ret = dpu_core_irq_unregister_callback(phys_enc->dpu_kms, irq->irq_idx, irq_idx 392 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx, ret); irq_idx 396 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->hw_idx, irq->irq_idx); irq_idx 398 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c irq->irq_idx = -EINVAL; irq_idx 179 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h int irq_idx; irq_idx 75 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx) irq_idx 104 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c static void dpu_encoder_phys_cmd_pp_rd_ptr_irq(void *arg, int irq_idx) irq_idx 124 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg, int irq_idx) irq_idx 142 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx) irq_idx 161 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c irq->irq_idx = -EINVAL; irq_idx 165 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c irq->irq_idx = -EINVAL; irq_idx 169 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c irq->irq_idx = -EINVAL; irq_idx 173 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c irq->irq_idx = -EINVAL; irq_idx 795 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c irq->irq_idx = -EINVAL; irq_idx 288 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx) irq_idx 334 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx) irq_idx 364 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c if (irq->irq_idx < 0) irq_idx 368 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c if (irq->irq_idx < 0) irq_idx 733 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c irq->irq_idx = -EINVAL; irq_idx 778 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c int irq_idx; irq_idx 812 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c for (irq_idx = start_idx; irq_idx 813 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c (irq_idx < end_idx) && irq_status; irq_idx 814 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c irq_idx++) irq_idx 815 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c if ((irq_status & dpu_irq_map[irq_idx].irq_mask) && irq_idx 816 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c (dpu_irq_map[irq_idx].reg_idx == reg_idx)) { irq_idx 825 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c cbfunc(arg, irq_idx); irq_idx 828 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c intr, irq_idx); irq_idx 835 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c irq_status &= ~dpu_irq_map[irq_idx].irq_mask; irq_idx 841 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c static int dpu_hw_intr_enable_irq(struct dpu_hw_intr *intr, int irq_idx) irq_idx 853 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c if (irq_idx < 0 || irq_idx >= ARRAY_SIZE(dpu_irq_map)) { irq_idx 854 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c pr_err("invalid IRQ index: [%d]\n", irq_idx); irq_idx 858 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c irq = &dpu_irq_map[irq_idx]; irq_idx 888 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c static int dpu_hw_intr_disable_irq_nolock(struct dpu_hw_intr *intr, int irq_idx) irq_idx 899 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c if (irq_idx < 0 || irq_idx >= ARRAY_SIZE(dpu_irq_map)) { irq_idx 900 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c pr_err("invalid IRQ index: [%d]\n", irq_idx); irq_idx 904 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c irq = &dpu_irq_map[irq_idx]; irq_idx 932 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c static int dpu_hw_intr_disable_irq(struct dpu_hw_intr *intr, int irq_idx) irq_idx 939 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c if (irq_idx < 0 || irq_idx >= ARRAY_SIZE(dpu_irq_map)) { irq_idx 940 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c pr_err("invalid IRQ index: [%d]\n", irq_idx); irq_idx 945 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c dpu_hw_intr_disable_irq_nolock(intr, irq_idx); irq_idx 1017 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c int irq_idx) irq_idx 1024 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c reg_idx = dpu_irq_map[irq_idx].reg_idx; irq_idx 1026 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c dpu_irq_map[irq_idx].irq_mask); irq_idx 1033 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c int irq_idx, bool clear) irq_idx 1042 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c if (irq_idx >= ARRAY_SIZE(dpu_irq_map) || irq_idx < 0) { irq_idx 1043 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c pr_err("invalid IRQ index: [%d]\n", irq_idx); irq_idx 1049 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c reg_idx = dpu_irq_map[irq_idx].reg_idx; irq_idx 1052 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c dpu_irq_map[irq_idx].irq_mask; irq_idx 102 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h int irq_idx); irq_idx 112 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h int irq_idx); irq_idx 141 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h void (*cbfunc)(void *arg, int irq_idx), irq_idx 159 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h int irq_idx); irq_idx 170 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h int irq_idx, irq_idx 75 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h void (*func)(void *arg, int irq_idx); irq_idx 172 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h int irq_idx), irq_idx 173 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx), irq_idx 178 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field( int, irq_idx ) irq_idx 184 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx = irq_idx; irq_idx 188 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx) irq_idx 192 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h int irq_idx), irq_idx 193 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx) irq_idx 197 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h int irq_idx), irq_idx 198 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx) irq_idx 203 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt), irq_idx 204 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx, pp_idx, atomic_cnt), irq_idx 209 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field( int, irq_idx ) irq_idx 217 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx = irq_idx; irq_idx 223 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt) irq_idx 885 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, int enable_count), irq_idx 886 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, enable_count), irq_idx 888 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field( int, irq_idx ) irq_idx 892 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx = irq_idx; irq_idx 895 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_printk("irq_idx:%d enable_count:%u", __entry->irq_idx, irq_idx 899 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, int enable_count), irq_idx 900 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, enable_count) irq_idx 903 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, int enable_count), irq_idx 904 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, enable_count) irq_idx 908 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), irq_idx 909 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, callback), irq_idx 911 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field( int, irq_idx ) irq_idx 915 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->irq_idx = irq_idx; irq_idx 918 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_printk("irq_idx:%d callback:%pK", __entry->irq_idx, irq_idx 922 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), irq_idx 923 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, callback) irq_idx 926 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), irq_idx 927 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(irq_idx, callback) irq_idx 136 drivers/net/ethernet/amazon/ena/ena_netdev.c int irq_idx = ENA_IO_IRQ_IDX(i); irq_idx 139 drivers/net/ethernet/amazon/ena/ena_netdev.c pci_irq_vector(adapter->pdev, irq_idx)); irq_idx 1400 drivers/net/ethernet/amazon/ena/ena_netdev.c int irq_idx, i, cpu; irq_idx 1405 drivers/net/ethernet/amazon/ena/ena_netdev.c irq_idx = ENA_IO_IRQ_IDX(i); irq_idx 1408 drivers/net/ethernet/amazon/ena/ena_netdev.c snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, irq_idx 1410 drivers/net/ethernet/amazon/ena/ena_netdev.c adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; irq_idx 1411 drivers/net/ethernet/amazon/ena/ena_netdev.c adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; irq_idx 1412 drivers/net/ethernet/amazon/ena/ena_netdev.c adapter->irq_tbl[irq_idx].vector = irq_idx 1413 drivers/net/ethernet/amazon/ena/ena_netdev.c pci_irq_vector(adapter->pdev, irq_idx); irq_idx 1414 drivers/net/ethernet/amazon/ena/ena_netdev.c adapter->irq_tbl[irq_idx].cpu = cpu; irq_idx 1417 drivers/net/ethernet/amazon/ena/ena_netdev.c &adapter->irq_tbl[irq_idx].affinity_hint_mask); irq_idx 657 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c int i, j, err, irq_idx = 0, qset_idx = 0; irq_idx 661 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c irq_idx = -1; irq_idx 671 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c irq_idx, irq_idx 597 drivers/net/ethernet/freescale/fec.h void fec_ptp_init(struct platform_device *pdev, int irq_idx); irq_idx 572 drivers/net/ethernet/freescale/fec_ptp.c void fec_ptp_init(struct platform_device *pdev, int irq_idx) irq_idx 605 drivers/net/ethernet/freescale/fec_ptp.c irq = platform_get_irq_optional(pdev, irq_idx); irq_idx 446 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c bool irq_idx, is_ver1; irq_idx 453 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c irq_idx = HNS_RCB_IRQ_IDX_RX; irq_idx 459 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c irq_idx = HNS_RCB_IRQ_IDX_TX; irq_idx 470 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c ring->irq = ring_pair_cb->virq[irq_idx]; irq_idx 25 drivers/ntb/test/ntb_msi_test.c int irq_idx; irq_idx 49 drivers/ntb/test/ntb_msi_test.c isr_ctx->irq_idx); irq_idx 73 drivers/ntb/test/ntb_msi_test.c nm->isr_ctx[i].irq_idx = i; irq_idx 26 drivers/platform/x86/i2c-multi-instantiate.c int irq_idx; irq_idx 98 drivers/platform/x86/i2c-multi-instantiate.c ret = acpi_dev_gpio_irq_get(adev, inst_data[i].irq_idx); irq_idx 101 drivers/platform/x86/i2c-multi-instantiate.c inst_data[i].irq_idx, ret); irq_idx 107 drivers/platform/x86/i2c-multi-instantiate.c ret = platform_get_irq(pdev, inst_data[i].irq_idx); irq_idx 110 drivers/platform/x86/i2c-multi-instantiate.c inst_data[i].irq_idx, ret); irq_idx 433 kernel/irq/generic-chip.c int irq_idx; irq_idx 439 kernel/irq/generic-chip.c irq_idx = hw_irq % dgc->irqs_per_chip; irq_idx 441 kernel/irq/generic-chip.c clear_bit(irq_idx, &gc->installed);