irq_ic_data        45 drivers/irqchip/irq-sun4i.c static struct sun4i_irq_chip_data *irq_ic_data;
irq_ic_data        56 drivers/irqchip/irq-sun4i.c 	writel(BIT(0), irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0));
irq_ic_data        66 drivers/irqchip/irq-sun4i.c 	val = readl(irq_ic_data->irq_base +
irq_ic_data        67 drivers/irqchip/irq-sun4i.c 			SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg));
irq_ic_data        69 drivers/irqchip/irq-sun4i.c 	       irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg));
irq_ic_data        79 drivers/irqchip/irq-sun4i.c 	val = readl(irq_ic_data->irq_base +
irq_ic_data        80 drivers/irqchip/irq-sun4i.c 			SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg));
irq_ic_data        82 drivers/irqchip/irq-sun4i.c 	       irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg));
irq_ic_data       110 drivers/irqchip/irq-sun4i.c 	irq_ic_data->irq_base = of_iomap(node, 0);
irq_ic_data       111 drivers/irqchip/irq-sun4i.c 	if (!irq_ic_data->irq_base)
irq_ic_data       116 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 0));
irq_ic_data       117 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 1));
irq_ic_data       118 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 2));
irq_ic_data       121 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 0));
irq_ic_data       122 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 1));
irq_ic_data       123 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 2));
irq_ic_data       126 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0));
irq_ic_data       127 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(1));
irq_ic_data       128 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(2));
irq_ic_data       131 drivers/irqchip/irq-sun4i.c 	writel(0x01, irq_ic_data->irq_base + SUN4I_IRQ_PROTECTION_REG);
irq_ic_data       134 drivers/irqchip/irq-sun4i.c 	writel(0x00, irq_ic_data->irq_base + SUN4I_IRQ_NMI_CTRL_REG);
irq_ic_data       136 drivers/irqchip/irq-sun4i.c 	irq_ic_data->irq_domain = irq_domain_add_linear(node, 3 * 32,
irq_ic_data       138 drivers/irqchip/irq-sun4i.c 	if (!irq_ic_data->irq_domain)
irq_ic_data       149 drivers/irqchip/irq-sun4i.c 	irq_ic_data = kzalloc(sizeof(struct sun4i_irq_chip_data), GFP_KERNEL);
irq_ic_data       150 drivers/irqchip/irq-sun4i.c 	if (!irq_ic_data) {
irq_ic_data       155 drivers/irqchip/irq-sun4i.c 	irq_ic_data->enable_reg_offset = SUN4I_IRQ_ENABLE_REG_OFFSET;
irq_ic_data       156 drivers/irqchip/irq-sun4i.c 	irq_ic_data->mask_reg_offset = SUN4I_IRQ_MASK_REG_OFFSET;
irq_ic_data       166 drivers/irqchip/irq-sun4i.c 	irq_ic_data = kzalloc(sizeof(struct sun4i_irq_chip_data), GFP_KERNEL);
irq_ic_data       167 drivers/irqchip/irq-sun4i.c 	if (!irq_ic_data) {
irq_ic_data       172 drivers/irqchip/irq-sun4i.c 	irq_ic_data->enable_reg_offset = SUNIV_IRQ_ENABLE_REG_OFFSET;
irq_ic_data       173 drivers/irqchip/irq-sun4i.c 	irq_ic_data->mask_reg_offset = SUNIV_IRQ_MASK_REG_OFFSET;
irq_ic_data       195 drivers/irqchip/irq-sun4i.c 	hwirq = readl(irq_ic_data->irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
irq_ic_data       197 drivers/irqchip/irq-sun4i.c 		  !(readl(irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0)) &
irq_ic_data       202 drivers/irqchip/irq-sun4i.c 		handle_domain_irq(irq_ic_data->irq_domain, hwirq, regs);
irq_ic_data       203 drivers/irqchip/irq-sun4i.c 		hwirq = readl(irq_ic_data->irq_base +