ITLB              184 arch/arc/include/asm/perf_event.h 	[C(ITLB)] = {
ITLB              112 arch/arm/kernel/perf_event_v6.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV6_PERFCTR_ITLB_MISS,
ITLB              113 arch/arm/kernel/perf_event_v6.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV6_PERFCTR_ITLB_MISS,
ITLB              175 arch/arm/kernel/perf_event_v6.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV6MPCORE_PERFCTR_ITLB_MISS,
ITLB              176 arch/arm/kernel/perf_event_v6.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV6MPCORE_PERFCTR_ITLB_MISS,
ITLB              195 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              196 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              239 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              240 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              285 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              286 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              334 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              335 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              383 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              384 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              433 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              434 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= ARMV7_PERFCTR_ITLB_REFILL,
ITLB              483 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)]	= KRAIT_PERFCTR_L1_ITLB_ACCESS,
ITLB              484 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_ACCESS)]	= KRAIT_PERFCTR_L1_ITLB_ACCESS,
ITLB              527 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
ITLB              528 arch/arm/kernel/perf_event_v7.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
ITLB               83 arch/arm/kernel/perf_event_xscale.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= XSCALE_PERFCTR_ITLB_MISS,
ITLB               84 arch/arm/kernel/perf_event_xscale.c 	[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)]	= XSCALE_PERFCTR_ITLB_MISS,
ITLB               66 arch/arm64/kernel/perf_event.c 	[C(ITLB)][C(OP_READ)][C(RESULT_MISS)]	= ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL,
ITLB               67 arch/arm64/kernel/perf_event.c 	[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)]	= ARMV8_PMUV3_PERFCTR_L1I_TLB,
ITLB              827 arch/csky/kernel/perf_event.c 	[C(ITLB)] = {
ITLB              928 arch/mips/kernel/perf_event_mipsxx.c [C(ITLB)] = {
ITLB             1004 arch/mips/kernel/perf_event_mipsxx.c [C(ITLB)] = {
ITLB             1101 arch/mips/kernel/perf_event_mipsxx.c [C(ITLB)] = {
ITLB             1215 arch/mips/kernel/perf_event_mipsxx.c [C(ITLB)] = {
ITLB             1264 arch/mips/kernel/perf_event_mipsxx.c [C(ITLB)] = {
ITLB              322 arch/nds32/include/asm/pmu.h 	[C(ITLB)] = {
ITLB               26 arch/powerpc/perf/8xx-pmu.c #define ITLB_LOAD_MISS	(C(ITLB) | (C(OP_READ) << 8) | (C(RESULT_MISS) << 16))
ITLB              161 arch/powerpc/perf/generic-compat-pmu.c 	[ C(ITLB) ] = {
ITLB              378 arch/powerpc/perf/mpc7450-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              642 arch/powerpc/perf/power5+-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              584 arch/powerpc/perf/power5-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              505 arch/powerpc/perf/power6-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              356 arch/powerpc/perf/power7-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              313 arch/powerpc/perf/power8-pmu.c 	[ C(ITLB) ] = {
ITLB              370 arch/powerpc/perf/power9-pmu.c 	[ C(ITLB) ] = {
ITLB              456 arch/powerpc/perf/ppc970-pmu.c 	[C(ITLB)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
ITLB              112 arch/riscv/kernel/perf_event.c 	[C(ITLB)] = {
ITLB              151 arch/sh/kernel/cpu/sh4/perf_event.c 	[ C(ITLB) ] = {
ITLB              176 arch/sh/kernel/cpu/sh4a/perf_event.c 	[ C(ITLB) ] = {
ITLB              277 arch/sparc/kernel/perf_event.c [C(ITLB)] = {
ITLB              415 arch/sparc/kernel/perf_event.c [C(ITLB)] = {
ITLB              550 arch/sparc/kernel/perf_event.c [C(ITLB)] = {
ITLB              687 arch/sparc/kernel/perf_event.c [C(ITLB)] = {
ITLB               78 arch/x86/events/amd/core.c  [ C(ITLB) ] = {
ITLB              182 arch/x86/events/amd/core.c [C(ITLB)] = {
ITLB              481 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB              715 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB              865 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1027 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1210 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1315 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1406 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1562 arch/x86/events/intel/core.c  [ C(ITLB) ] = {
ITLB             1691 arch/x86/events/intel/core.c 	[C(ITLB)] = {
ITLB             1807 arch/x86/events/intel/core.c 	[C(ITLB)] = {
ITLB             4755 arch/x86/events/intel/core.c 		hw_cache_event_ids[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = -1;
ITLB             5042 arch/x86/events/intel/core.c 		hw_cache_event_ids[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = -1;
ITLB               89 arch/x86/events/intel/knc.c  [ C(ITLB) ] = {
ITLB              545 arch/x86/events/intel/p4.c  [ C(ITLB) ] = {
ITLB               84 arch/x86/events/intel/p6.c  [ C(ITLB) ] = {
ITLB               96 arch/xtensa/kernel/perf_event.c 	[C(ITLB)] = {
ITLB              529 tools/perf/util/evsel.c  [C(ITLB)]	= (CACHE_READ),