ipu_clk 1715 drivers/dma/ipu/ipu_idmac.c ipu_data.ipu_clk = clk_get(&pdev->dev, NULL); ipu_clk 1716 drivers/dma/ipu/ipu_idmac.c if (IS_ERR(ipu_data.ipu_clk)) { ipu_clk 1717 drivers/dma/ipu/ipu_idmac.c ret = PTR_ERR(ipu_data.ipu_clk); ipu_clk 1722 drivers/dma/ipu/ipu_idmac.c clk_prepare_enable(ipu_data.ipu_clk); ipu_clk 1754 drivers/dma/ipu/ipu_idmac.c clk_disable_unprepare(ipu_data.ipu_clk); ipu_clk 1755 drivers/dma/ipu/ipu_idmac.c clk_put(ipu_data.ipu_clk); ipu_clk 1772 drivers/dma/ipu/ipu_idmac.c clk_disable_unprepare(ipu->ipu_clk); ipu_clk 1773 drivers/dma/ipu/ipu_idmac.c clk_put(ipu->ipu_clk); ipu_clk 157 drivers/dma/ipu/ipu_intern.h struct clk *ipu_clk; ipu_clk 949 drivers/gpu/ipu-v3/ipu-common.c struct clk *ipu_clk) ipu_clk 963 drivers/gpu/ipu-v3/ipu-common.c IPU_CONF_CSI0_EN, ipu_clk); ipu_clk 970 drivers/gpu/ipu-v3/ipu-common.c IPU_CONF_CSI1_EN, ipu_clk); ipu_clk 999 drivers/gpu/ipu-v3/ipu-common.c IPU_CONF_DI0_EN, ipu_clk); ipu_clk 1006 drivers/gpu/ipu-v3/ipu-common.c IPU_CONF_DI1_EN, ipu_clk); ipu_clk 1020 drivers/gpu/ipu-v3/ipu-common.c devtype->cm_ofs + IPU_CM_DMFC_REG_OFS, ipu_clk); ipu_clk 193 drivers/gpu/ipu-v3/ipu-csi.c u32 ipu_clk) ipu_clk 198 drivers/gpu/ipu-v3/ipu-csi.c div_ratio = (ipu_clk / pixel_clk) - 1; ipu_clk 611 drivers/gpu/ipu-v3/ipu-csi.c u32 ipu_clk = clk_get_rate(csi->clk_ipu); ipu_clk 623 drivers/gpu/ipu-v3/ipu-csi.c ipu_csi_set_testgen_mclk(csi, pix_clk, ipu_clk); ipu_clk 173 drivers/gpu/ipu-v3/ipu-dmfc.c struct clk *ipu_clk) ipu_clk 236 drivers/gpu/ipu-v3/ipu-prv.h unsigned long base, u32 module, struct clk *ipu_clk); ipu_clk 240 drivers/gpu/ipu-v3/ipu-prv.h struct clk *ipu_clk); ipu_clk 518 drivers/video/fbdev/mx3fb.c struct clk *ipu_clk; ipu_clk 566 drivers/video/fbdev/mx3fb.c ipu_clk = clk_get(mx3fb->dev, NULL); ipu_clk 567 drivers/video/fbdev/mx3fb.c if (!IS_ERR(ipu_clk)) { ipu_clk 568 drivers/video/fbdev/mx3fb.c div = clk_get_rate(ipu_clk) * 16 / pixel_clk; ipu_clk 569 drivers/video/fbdev/mx3fb.c clk_put(ipu_clk);