iomuxc_gpr 75 drivers/gpu/ipu-v3/ipu-prg.c struct regmap *iomuxc_gpr; iomuxc_gpr 213 drivers/gpu/ipu-v3/ipu-prg.c regmap_update_bits(prg->iomuxc_gpr, IOMUXC_GPR5, iomuxc_gpr 218 drivers/gpu/ipu-v3/ipu-prg.c regmap_read(prg->iomuxc_gpr, IOMUXC_GPR5, &val); iomuxc_gpr 220 drivers/gpu/ipu-v3/ipu-prg.c regmap_update_bits(prg->iomuxc_gpr, IOMUXC_GPR5, iomuxc_gpr 384 drivers/gpu/ipu-v3/ipu-prg.c prg->iomuxc_gpr = iomuxc_gpr 386 drivers/gpu/ipu-v3/ipu-prg.c if (IS_ERR(prg->iomuxc_gpr)) iomuxc_gpr 387 drivers/gpu/ipu-v3/ipu-prg.c return PTR_ERR(prg->iomuxc_gpr); iomuxc_gpr 72 drivers/pci/controller/dwc/pci-imx6.c struct regmap *iomuxc_gpr; iomuxc_gpr 388 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 392 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, iomuxc_gpr 397 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 402 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 404 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 439 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 445 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 454 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 471 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, iomuxc_gpr 474 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, iomuxc_gpr 488 drivers/pci/controller/dwc/pci-imx6.c if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, iomuxc_gpr 576 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, iomuxc_gpr 580 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, iomuxc_gpr 621 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); iomuxc_gpr 632 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, iomuxc_gpr 638 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 642 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 647 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 651 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 654 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, iomuxc_gpr 657 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, iomuxc_gpr 660 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, iomuxc_gpr 663 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, iomuxc_gpr 666 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, iomuxc_gpr 749 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 900 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 925 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 928 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 958 drivers/pci/controller/dwc/pci-imx6.c regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, iomuxc_gpr 1141 drivers/pci/controller/dwc/pci-imx6.c imx6_pcie->iomuxc_gpr = iomuxc_gpr 1143 drivers/pci/controller/dwc/pci-imx6.c if (IS_ERR(imx6_pcie->iomuxc_gpr)) { iomuxc_gpr 1145 drivers/pci/controller/dwc/pci-imx6.c return PTR_ERR(imx6_pcie->iomuxc_gpr);