ioasic_base 100 arch/mips/dec/prom/identify.c ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); ioasic_base 110 arch/mips/dec/prom/identify.c ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); ioasic_base 65 arch/mips/dec/setup.c volatile u32 *ioasic_base; ioasic_base 67 arch/mips/dec/setup.c EXPORT_SYMBOL(ioasic_base); ioasic_base 18 arch/mips/include/asm/dec/ioasic.h extern volatile u32 *ioasic_base; ioasic_base 22 arch/mips/include/asm/dec/ioasic.h ioasic_base[reg / 4] = v; ioasic_base 27 arch/mips/include/asm/dec/ioasic.h return ioasic_base[reg / 4];