intr1 753 drivers/gpu/drm/bridge/sii9234.c int intr1, intr4; intr1 761 drivers/gpu/drm/bridge/sii9234.c intr1 = mhl_tx_readb(ctx, MHL_TX_INTR1_REG); intr1 772 drivers/gpu/drm/bridge/sii9234.c intr1, intr1_en, intr4, intr4_en, cbus_intr1, cbus_intr2); intr1 776 drivers/gpu/drm/bridge/sii9234.c if (intr1 & RSEN_CHANGE_INT) intr1 780 drivers/gpu/drm/bridge/sii9234.c if (intr1 & HPD_CHANGE_INT) intr1 789 drivers/gpu/drm/bridge/sii9234.c mhl_tx_writeb(ctx, MHL_TX_INTR1_REG, intr1); intr1 652 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c u32 intr1 = nvkm_rd32(device, 0x610024); intr1 666 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c if (intr1 & 0x00000004) { intr1 671 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c if (intr1 & 0x00000008) { intr1 676 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c if (intr1 & 0x00000070) { intr1 677 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c disp->super = (intr1 & 0x00000070); intr1 31 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c u32 intr1 = nvkm_rd32(device, 0x00e074); intr1 33 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c u32 stat1 = nvkm_rd32(device, 0x00e070) & intr1; intr1 37 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c nvkm_wr32(device, 0x00e074, intr1); intr1 31 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c u32 intr1 = nvkm_rd32(device, 0x00dc80); intr1 33 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c u32 stat1 = nvkm_rd32(device, 0x00dc88) & intr1; intr1 37 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c nvkm_wr32(device, 0x00dc80, intr1); intr1 64 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c u32 intr1 = nvkm_rd32(device, 0x121c5c); intr1 86 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c for (i = 0; intr1 && i < gpcnr; i++) { intr1 88 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c if (intr1 & stat) { intr1 90 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c intr1 &= ~stat; intr1 64 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c u32 intr1 = nvkm_rd32(device, 0x12005c); intr1 86 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c for (i = 0; intr1 && i < gpcnr; i++) { intr1 88 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c if (intr1 & stat) { intr1 90 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c intr1 &= ~stat; intr1 84 drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c u32 intr1 = nvkm_rd32(device, 0x000104); intr1 85 drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c return intr0 | intr1; intr1 2902 drivers/infiniband/hw/qib/qib_iba7322.c u64 intr1 = istat & (INT_MASK_P(SDma, 1) | intr1 2907 drivers/infiniband/hw/qib/qib_iba7322.c if (intr1) intr1 340 sound/soc/codecs/wcd9335.c int intr1; intr1 5122 sound/soc/codecs/wcd9335.c wcd->intr1 = of_irq_get_byname(wcd->dev->of_node, "intr1"); intr1 5123 sound/soc/codecs/wcd9335.c if (wcd->intr1 < 0) { intr1 5124 sound/soc/codecs/wcd9335.c if (wcd->intr1 != -EPROBE_DEFER) intr1 5127 sound/soc/codecs/wcd9335.c return wcd->intr1; intr1 5130 sound/soc/codecs/wcd9335.c ret = devm_regmap_add_irq_chip(wcd->dev, wcd->regmap, wcd->intr1,