intf_sel 567 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c uint32_t intf_sel; intf_sel 569 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel = mdp4_read(mdp4_kms, REG_MDP4_DISP_INTF_SEL); intf_sel 573 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel &= ~MDP4_DISP_INTF_SEL_PRIM__MASK; intf_sel 574 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel |= MDP4_DISP_INTF_SEL_PRIM(intf); intf_sel 577 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel &= ~MDP4_DISP_INTF_SEL_SEC__MASK; intf_sel 578 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel |= MDP4_DISP_INTF_SEL_SEC(intf); intf_sel 581 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel &= ~MDP4_DISP_INTF_SEL_EXT__MASK; intf_sel 582 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel |= MDP4_DISP_INTF_SEL_EXT(intf); intf_sel 587 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel &= ~MDP4_DISP_INTF_SEL_DSI_CMD; intf_sel 588 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel |= MDP4_DISP_INTF_SEL_DSI_VIDEO; intf_sel 590 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel &= ~MDP4_DISP_INTF_SEL_DSI_VIDEO; intf_sel 591 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c intf_sel |= MDP4_DISP_INTF_SEL_DSI_CMD; intf_sel 598 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c DBG("%s: intf_sel=%08x", mdp4_crtc->name, intf_sel); intf_sel 600 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp4_write(mdp4_kms, REG_MDP4_DISP_INTF_SEL, intf_sel); intf_sel 104 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c u32 intf_sel; intf_sel 107 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel = mdp5_read(mdp5_kms, REG_MDP5_DISP_INTF_SEL); intf_sel 111 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel &= ~MDP5_DISP_INTF_SEL_INTF0__MASK; intf_sel 112 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel |= MDP5_DISP_INTF_SEL_INTF0(intf->type); intf_sel 115 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel &= ~MDP5_DISP_INTF_SEL_INTF1__MASK; intf_sel 116 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel |= MDP5_DISP_INTF_SEL_INTF1(intf->type); intf_sel 119 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel &= ~MDP5_DISP_INTF_SEL_INTF2__MASK; intf_sel 120 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel |= MDP5_DISP_INTF_SEL_INTF2(intf->type); intf_sel 123 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel &= ~MDP5_DISP_INTF_SEL_INTF3__MASK; intf_sel 124 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c intf_sel |= MDP5_DISP_INTF_SEL_INTF3(intf->type); intf_sel 131 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, intf_sel);