intermediate 690 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_pipe_wm intermediate; intermediate 711 drivers/gpu/drm/i915/display/intel_display_types.h struct vlv_wm_state intermediate; intermediate 722 drivers/gpu/drm/i915/display/intel_display_types.h struct g4x_wm_state intermediate; intermediate 1424 drivers/gpu/drm/i915/intel_pm.c struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate; intermediate 1434 drivers/gpu/drm/i915/intel_pm.c *intermediate = *optimal; intermediate 1436 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = false; intermediate 1437 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll_en = false; intermediate 1441 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = optimal->cxsr && active->cxsr && intermediate 1443 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll_en = optimal->hpll_en && active->hpll_en && intermediate 1445 drivers/gpu/drm/i915/intel_pm.c intermediate->fbc_en = optimal->fbc_en && active->fbc_en; intermediate 1448 drivers/gpu/drm/i915/intel_pm.c intermediate->wm.plane[plane_id] = intermediate 1452 drivers/gpu/drm/i915/intel_pm.c WARN_ON(intermediate->wm.plane[plane_id] > intermediate 1456 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.plane = max(optimal->sr.plane, intermediate 1458 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.cursor = max(optimal->sr.cursor, intermediate 1460 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.fbc = max(optimal->sr.fbc, intermediate 1463 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.plane = max(optimal->hpll.plane, intermediate 1465 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.cursor = max(optimal->hpll.cursor, intermediate 1467 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.fbc = max(optimal->hpll.fbc, intermediate 1470 drivers/gpu/drm/i915/intel_pm.c WARN_ON((intermediate->sr.plane > intermediate 1472 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.cursor > intermediate 1474 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr); intermediate 1475 drivers/gpu/drm/i915/intel_pm.c WARN_ON((intermediate->sr.plane > intermediate 1477 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.cursor > intermediate 1479 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll_en); intermediate 1481 drivers/gpu/drm/i915/intel_pm.c WARN_ON(intermediate->sr.fbc > g4x_fbc_fifo_size(1) && intermediate 1482 drivers/gpu/drm/i915/intel_pm.c intermediate->fbc_en && intermediate->cxsr); intermediate 1483 drivers/gpu/drm/i915/intel_pm.c WARN_ON(intermediate->hpll.fbc > g4x_fbc_fifo_size(2) && intermediate 1484 drivers/gpu/drm/i915/intel_pm.c intermediate->fbc_en && intermediate->hpll_en); intermediate 1491 drivers/gpu/drm/i915/intel_pm.c if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0) intermediate 1569 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; intermediate 2057 drivers/gpu/drm/i915/intel_pm.c struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; intermediate 2067 drivers/gpu/drm/i915/intel_pm.c *intermediate = *optimal; intermediate 2069 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = false; intermediate 2073 drivers/gpu/drm/i915/intel_pm.c intermediate->num_levels = min(optimal->num_levels, active->num_levels); intermediate 2074 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = optimal->cxsr && active->cxsr && intermediate 2077 drivers/gpu/drm/i915/intel_pm.c for (level = 0; level < intermediate->num_levels; level++) { intermediate 2081 drivers/gpu/drm/i915/intel_pm.c intermediate->wm[level].plane[plane_id] = intermediate 2086 drivers/gpu/drm/i915/intel_pm.c intermediate->sr[level].plane = min(optimal->sr[level].plane, intermediate 2088 drivers/gpu/drm/i915/intel_pm.c intermediate->sr[level].cursor = min(optimal->sr[level].cursor, intermediate 2092 drivers/gpu/drm/i915/intel_pm.c vlv_invalidate_wms(crtc, intermediate, level); intermediate 2099 drivers/gpu/drm/i915/intel_pm.c if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0) intermediate 2188 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; intermediate 3200 drivers/gpu/drm/i915/intel_pm.c struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; intermediate 5738 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate; intermediate 6053 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.intermediate = *active; intermediate 6116 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.intermediate = intermediate 6209 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.intermediate = *active; intermediate 6262 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.intermediate = intermediate 381 drivers/net/wireless/broadcom/b43/debugfs.c stat->intermediate, stat->for_ampdu, intermediate 1352 drivers/net/wireless/broadcom/b43/main.c stat.intermediate = !!(tmp & 0x0040); intermediate 835 drivers/net/wireless/broadcom/b43/xmit.c if (status->intermediate) intermediate 221 drivers/net/wireless/broadcom/b43/xmit.h u8 intermediate; /* Intermediate status notification (not final) */ intermediate 158 drivers/net/wireless/broadcom/b43legacy/debugfs.c stat->intermediate, stat->for_ampdu, intermediate 725 drivers/net/wireless/broadcom/b43legacy/main.c stat.intermediate = !!(tmp & 0x0040); intermediate 577 drivers/net/wireless/broadcom/b43legacy/xmit.c if (status->intermediate) intermediate 612 drivers/net/wireless/broadcom/b43legacy/xmit.c status.intermediate = !!(tmp & 0x40); intermediate 100 drivers/net/wireless/broadcom/b43legacy/xmit.h u8 intermediate;/* Intermediate status notification */ intermediate 510 drivers/spi/spi-zynqmp-gqspi.c u32 count = 0, intermediate; intermediate 513 drivers/spi/spi-zynqmp-gqspi.c memcpy(&intermediate, xqspi->txbuf, 4); intermediate 514 drivers/spi/spi-zynqmp-gqspi.c zynqmp_gqspi_write(xqspi, GQSPI_TXD_OFST, intermediate);